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UC1848 データシート(Datasheet) 4 Page - Texas Instruments

部品番号. UC1848
部品情報  Average Current Mode PWM Controller
ダウンロード  9 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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4
UC1848
UC2848
UC3848
Figure 1: Under voltage lockout.
UDG-93004
Figure 2: Oscillator frequency.
10
100
1000
10000
10
100
1000
10000
C (pF)
Oscillator Frequency as a Function of CT
Frequency Decrease as a Function of RT
RT = Open
UDG-93006
UDG-93005
When both the UV and VCC comparators are high, the
internal bias circuitry for the rest of the chip is activated.
The CDC pin (see discussion on Maximum Duty Cycle
Control and Soft Start) and the Output are held low until
VREF exceeds the 4.5V threshold of the VREF com-
parator. When VREF is good, control of the output driver
is transferred to the PWM circuitry and CDC is allowed to
charge.
If any of the three UVLO comparators go low, the UVLO
latch is set, the output is held low, and CDC is dis-
charged. This state will be maintained until all three com-
parators are high and the CDC pin is fully discharged.
APPLICATION INFORMATION (cont.)




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