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FM32L276 データシート(PDF) 4 Page - Ramtron International Corporation |
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FM32L276 データシート(HTML) 4 Page - Ramtron International Corporation |
4 / 21 page FM32L278/L276/L274/L272 - 3V I2C Companion Rev. 3.0 Feb. 2009 Page 4 of 21 Overview The FM32L27x family combines a serial nonvolatile RAM with a processor companion. The companion is a highly integrated peripheral including a processor supervisor, a comparator used for early power-fail warning, nonvolatile event counters, and a 64-bit serial number. The FM32L27x integrates these complementary but distinct functions that share a common interface in a single package. Although monolithic, the product is organized as two logical devices, the F-RAM memory and the companion. From the system perspective they appear to be two separate devices with unique IDs on the serial bus. The FM32L27x provides the same functions as the FM31L27x with the exception of the real-time clock. This makes it easy to develop a common design that can either include timekeeping by using the FM31L27x or exclude it by using the FM32L27x. All other features are identical. The register address map is even preserved so that software can be identical. The memory is organized as a stand-alone 2-wire nonvolatile memory with a standard device ID value. The companion functions are accessed under their own 2-wire device ID. This allows the companion functions to be read while maintaining the most recently used memory address. The companion functions are controlled by 16 special function registers. The event counter circuits and related registers are maintained by the power source on the VBAK pin, allowing them to operate from battery or backup capacitor power when VDD drops below a set threshold. Each functional block is described below. Memory Operation The FM32L27x is a family of products available in different memory sizes including 4Kb, 16Kb, 64Kb, and 256Kb. The family is software compatible, all versions use consistent two-byte addressing for the memory device. This makes the lowest density device different from its stand-alone memory counterparts but makes them compatible within the entire family. Memory is organized in bytes, for example the 4Kb memory is 512 x 8 and the 256Kb memory is 32,768 x 8. The memory is based on F-RAM technology. Therefore it can be treated as RAM and is read or written at the speed of the two-wire bus with no delays for write operations. It also offers effectively unlimited write endurance unlike other nonvolatile memory technologies. The 2-wire interface protocol is described further on page 13. The memory array can be write-protected by software. Two bits in the processor companion area (WP0, WP1 in register 0Bh) control the protection setting as shown in the following table. Based on the setting, the protected addresses cannot be written and the 2-wire interface will not acknowledge any data to protected addresses. The special function registers containing these bits are described in detail below. Write protect addresses WP1 WP0 None 0 0 Bottom 1/4 0 1 Bottom 1/2 1 0 Full array 1 1 Processor Companion In addition to nonvolatile RAM, the FM32L27x family incorporates a highly integrated processor companion. It includes a low voltage reset, a programmable watchdog timer, battery-backed event counters, a comparator for early power-fail detection or other purposes, and a 64-bit serial number. Processor Supervisor Supervisors provide a host processor two basic functions: detection of power supply fault conditions and a watchdog timer to escape a software lockup condition. All FM32L27x devices have a reset pin (/RST) to drive the processor reset input during power faults (and power-up) and software lockups. It is an open drain output with a weak internal pull-up to VDD. This allows other reset sources to be wire- OR’d to the /RST pin. When VDD is above the programmed trip point, /RST output is pulled weakly to VDD. If VDD drops below the reset trip point voltage level (VTP) the /RST pin will be driven low. It will remain low until VDD falls too low for circuit operation which is the VRST level. When VDD rises again above VTP, /RST will continue to drive low for at least 100 ms (tRPU) to ensure a robust system reset at a reliable VDD level. After tRPU has been met, the /RST pin will return to the weak high state. While /RST is asserted, serial bus activity is locked out even if a transaction occurred as VDD dropped below VTP. A memory operation started while VDD is above VTP will be completed internally. Figure 2 below illustrates the reset operation in response to the VDD voltage. Figure 2. Low Voltage Reset VDD VTP tRPU RST |
同様の部品番号 - FM32L276 |
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同様の説明 - FM32L276 |
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