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ATmega128-16AU データシート(PDF) 14 Page - ATMEL Corporation |
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ATmega128-16AU データシート(HTML) 14 Page - ATMEL Corporation |
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14 / 386 page  14 2467S–AVR–07/09 ATmega128 Stack Pointer The Stack is mainly used for storing temporary data, for storing local variables and for storing return addresses after interrupts and subroutine calls. The Stack Pointer Register always points to the top of the Stack. Note that the Stack is implemented as growing from higher memory loca- tions to lower memory locations. This implies that a Stack PUSH command decreases the Stack Pointer. The Stack Pointer points to the data SRAM stack area where the Subroutine and Interrupt Stacks are located. This Stack space in the data SRAM must be defined by the program before any subroutine calls are executed or interrupts are enabled. The Stack Pointer must be set to point above $60. The Stack Pointer is decremented by one when data is pushed onto the Stack with the PUSH instruction, and it is decremented by two when the return address is pushed onto the Stack with subroutine call or interrupt. The Stack Pointer is incremented by one when data is popped from the Stack with the POP instruction, and it is incremented by two when data is popped from the Stack with return from subroutine RET or return from interrupt RETI. The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of bits actually used is implementation dependent. Note that the data space in some implementa- tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register will not be present. RAM Page Z Select Register – RAMPZ • Bits 7..1 – Res: Reserved Bits These are reserved bits and will always read as zero. When writing to this address location, write these bits to zero for compatibility with future devices. • Bit 0 – RAMPZ0: Extended RAM Page Z-pointer The RAMPZ Register is normally used to select which 64K RAM Page is accessed by the Z- pointer. As the ATmega128 does not support more than 64K of SRAM memory, this register is used only to select which page in the program memory is accessed when the ELPM/SPM instruction is used. The different settings of the RAMPZ0 bit have the following effects: Note that LPM is not affected by the RAMPZ setting. Instruction Execution Timing This section describes the general access timing concepts for instruction execution. The AVR CPU is driven by the CPU clock clk CPU, directly generated from the selected clock source for the chip. No internal clock division is used. Bit 151413 1211 10 9 8 SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 SPH SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 SPL 765 432 10 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0 0 0 0 0 0 0 0 000 000 00 Bit 7 6 543 2 1 0 – –– – – – – – RAMPZ0 RAMPZ Read/Write R R R R R R R R/W Initial Value 0 0 0 0 0 0 0 0 RAMPZ0 = 0: Program memory address $0000 - $7FFF (lower 64K bytes) is accessed by ELPM/SPM RAMPZ0 = 1: Program memory address $8000 - $FFFF (higher 64K bytes) is accessed by ELPM/SPM |
同様の部品番号 - ATmega128-16AU |
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同様の説明 - ATmega128-16AU |
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