74HC244DTR2G datasheet(2/7 Pages) ONSEMI

部品番号	74HC244DTR2G

部品情報	Octal 3?뭆tate Noninverting Buffer/Line Driver/Line Receiver

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74HC244

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LOGIC DIAGRAM

DATA

INPUTS

A1

A2

A3

A4

B1

B2

B3

B4 17

15

13

11

8

6

4

218

16

14

12

9

7

5

3 YB4

YB3

YB2

YB1

YA4

YA3

YA2

YA1

NONINVERTING

OUTPUTS

PIN 20 = VCC

PIN 10 = GND

OUTPUT

ENABLES

ENABLE A

ENABLE B

1

19

FUNCTION TABLE

Inputs

Outputs

Enable A,

Enable B

A, B

YA, YB

LLL

LH

H

HX

Z

Z = high impedance

PIN ASSIGNMENT

A3

A2

YB4

A1

ENABLE A

GND

YB1

A4

YB2

YB3

5

4

3

2

1

10

9

8

7

6

14

15

16

17

18

19

20

11

12

13

YA2

B4

YA1

ENABLE B

VCC

B1

YA4

B2

YA3

B3

ORDERING INFORMATION

Device

Package

Shipping†

74HC244DTR2G

TSSOP−20*

2500 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Vout

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Iin

DC Input Current, per Pin

±20

mA

Iout

DC Output Current, per Pin

±35

mA

ICC

DC Supply Current, VCC and GND Pins

±75

mA

PD

Power Dissipation in Still Air, TSSOP Package†

450

mW

Tstg

Storage Temperature

– 65 to + 150

_C

TL

Lead Temperature, 1 mm from Case for 10 Seconds

(TSSOP Package)

260

_C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress

ratings only. Functional operation above the Recommended Operating Conditions is not implied.

Extended exposure to stresses above the Recommended Operating Conditions may affect device

reliability.

†Derating — TSSOP Package: − 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high−impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND v (Vin or Vout) v VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

同様の部品番号 - 74HC244DTR2G

メーカー	部品番号	データシート	部品情報
NXP Semiconductors	74HC244D	39Kb / 7P	Octal buffer/line driver; 3-state December 1990
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	74HC244D	145Kb / 18P	Octal buffer/line driver; 3-state Rev. 4-24 September 2012
	74HC244D	145Kb / 18P	Octal buffer/line driver; 3-state Rev. 4 ??24 September 2012 Rev. 4-24 September 2012

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