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DM9000A データシート(PDF) 4 Page - Davicom Semiconductor, Inc. |
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DM9000A データシート(HTML) 4 Page - Davicom Semiconductor, Inc. |
4 / 60 page DM9000A Ethernet Controller with General Processor Interface Final 4 Version: DM9000A-17-DS-F01 May 10, 2006 8.1 Basic Mode Control Register (BMCR) - 00 ................................................................................................................. 30 8.2 Basic Mode Status Register (BMSR) - 01..................................................................................................................... 31 8.3 PHY ID Identifier Register #1 (PHYID1) - 02 ............................................................................................................. 33 8.4 PHY ID Identifier Register #2 (PHYID2) - 03 ............................................................................................................. 33 8.5 Auto-negotiation Advertisement Register (ANAR) - 04................................................................................................ 34 8.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05.................................................................................. 35 8.7 Auto-negotiation Expansion Register (ANER)- 06....................................................................................................... 36 8.8 DAVICOM Specified Configuration Register (DSCR) - 16 ......................................................................................... 36 8.9 DAVICOM Specified Configuration and Status Register (DSCSR) - 17 ...................................................................... 38 8.10 10BASE-T Configuration/Status (10BTCSR) - 18...................................................................................................... 39 8.11 Power Down Control Register (PWDOR) - 19 .......................................................................................................... 40 8.12 (Specified config) Register – 20 ................................................................................................................................. 40 9. Functional Description ..................................................................................................................................................... 42 9.1 Host Interface .............................................................................................................................................................. 42 9.2 Direct Memory Access Control .................................................................................................................................... 42 9.3 Packet Transmission .................................................................................................................................................... 42 9.4 Packet Reception.......................................................................................................................................................... 42 9.5 100Base-TX Operation ................................................................................................................................................ 43 9.5.1 4B5B Encoder ...................................................................................................................................................... 43 9.5.2 Scrambler ............................................................................................................................................................. 43 9.5.3 Parallel to Serial Converter .................................................................................................................................. 43 9.5.4 NRZ to NRZI Encoder ......................................................................................................................................... 43 9.5.5 MLT-3 Converter.................................................................................................................................................. 43 9.5.6 MLT-3 Driver ....................................................................................................................................................... 43 9.5.7 4B5B Code Group................................................................................................................................................ 44 9.6 100Base-TX Receiver................................................................................................................................................... 45 9.6.1 Signal Detect ........................................................................................................................................................ 45 9.6.2 Adaptive Equalization .......................................................................................................................................... 45 9.6.3 MLT-3 to NRZI Decoder...................................................................................................................................... 45 9.6.4 Clock Recovery Module ...................................................................................................................................... 45 9.6.5 NRZI to NRZ ....................................................................................................................................................... 45 9.6.6 Serial to Parallel ................................................................................................................................................... 45 9.6.7 Descrambler ......................................................................................................................................................... 45 9.6.8 Code Group Alignment ........................................................................................................................................ 46 9.6.9 4B5B Decoder...................................................................................................................................................... 46 9.7 10Base-T Operation..................................................................................................................................................... 46 9.8 Collision Detection ...................................................................................................................................................... 46 9.9 Carrier Sense ............................................................................................................................................................... 46 9.10 Auto-Negotiation........................................................................................................................................................ 46 9.11 Power Reduced Mode ................................................................................................................................................ 47 9.11.1 Power Down Mode............................................................................................................................................. 47 |
同様の部品番号 - DM9000A |
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同様の説明 - DM9000A |
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