データシートサーチシステム |
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DM9013 データシート(PDF) 11 Page - Davicom Semiconductor, Inc. |
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DM9013 データシート(HTML) 11 Page - Davicom Semiconductor, Inc. |
11 / 75 page DM9013 3-port switch with Processor Interface Preliminary datasheet 11 DM9013-15-DS-P03 April 9, 2009 3. Features Ethernet Switch with two 10/100Mb PHY, one MII/RMII, and general processor bus interface Support Reverse-MII Processor bus slave architecture EEPROM interface for power up configurations Support TCP/UDP/IPv4 checksum offload Support HP Auto-MDIX Support IEEE 802.3x Flow Control in Full-duplex mode Support Back Pressure Flow Control in Half-duplex mode Per port support 4 priority queues by Port-based, 802.1P VLAN, and IP TOS priority Support 802.1Q VLAN up-to 16 VLAN group Support VLAN ID tag/untag options Per port support bandwidth, ingress and egress rate control Support Broadcast Storming filter function Support Store and Forward switching approach Support up-to 1K Uni-cast MAC addresses Automatic aging scheme Support MIB counters for diagnostic uP data bus driving capability adjustable Port 2 TXD/TXE driving capability adjustable Auto. control to prevent memory read count error 128-pin LQFP 1.8V internal core, 3.3V I/O with 5V tolerant |
同様の部品番号 - DM9013 |
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同様の説明 - DM9013 |
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