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ES51993 データシート(PDF) 4 Page - Cyrustek corporation

部品番号 ES51993
部品情報  11,000 Counts ADC
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メーカー  CYRUSTEK [Cyrustek corporation]
ホームページ  http://www.cyrustek.com.tw
Logo CYRUSTEK - Cyrustek corporation

ES51993 データシート(HTML) 4 Page - Cyrustek corporation

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06/09/20
4
ES51993
11,000 Counts ADC
Function description
1. Dual Slope A/D-Four Phases Timing
ES51993 is a dual-slope analog-to-digital converter (ADC). Figure 1 is a structure
of dual-slope integrator. Its measurement cycle has two distinct phases: input signal
integration (INT) phase and reference voltage integration (DINT) phase.
In INT phase, the input signal is integrated for a fixed time period, then A/D
enters DINT phase in which an opposite polarity constant reference voltage is
integrated until the integrator output voltage becomes to zero. Since both the time
period for input signal integration and the amount of reference voltage are fixed, thus
the de-integration time is proportional to the input signal. Hence, we can define the
mathematical equation about input signal, reference voltage integration (see Figure 1.):
×
×
×
=
×
INT
T
DINT
REF
IN
T
V
C
Buf
dt
t
V
C
Buf
0
int
1
)
(
int
1
where,
)
(t
V
IN
= input signal
REF
V
= reference voltage
INT
T
= integration time (fixed)
DINT
T
= de-integration time (proportional to
)
(t
V
IN
)
Figure 1. the structure of dual-slope integrator and its output waveform.
If
)
(t
V
IN
is a constant, we can rewrite above equation:
IN
REF
INT
DINT
V
V
T
T
×
=
RAZ
integration
time
input signal > 0
Fixed
integration
time
Variable
deintegration
time
integration
time
input signal < 0
Fixed
integration
time
Variable
deintegration
time
fixed slope
fixed slope
different
input
different
input
input
signal
reference
voltage
Buf
BufX10
Cint
integrator
output
RAZ


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