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Application setting method

Part No

Value

Notes for Use

R1/R2

22k/11k

voltage setting resistors (R1, R2). Output voltage can be set by VRxR2/(R1+R2) but it is

recommended to use at the resistance value (total: about 10 kΩ) which is not susceptible to

VREF bias current (±100nA).

C3

22μF

Connect the output capacitor between Vo terminal and GND terminal without fail in order to

stabilize output voltage. The output capacitor has a role to compensate for the phase of loop

gain and to reduce output voltage fluctuation when load is rapidly changed. When there is an

insufficient capacity value, there is a possibility to cause oscillation, and when the equivalent

serial resistance (ESR) of the capacitors is large, output voltage fluctuation is increased when

load is rapidly changed.

About 22µF ceramic capacitors are recommended but output

capacitor greatly depends on temperature and load conditions. In addition, when various

capacitors are connected in series, the total phase allowance of loop gain becomes not

sufficient, and oscillation may result. Thoroughgoing confirmation at application temperature

and under load range conditions is requested.

C1

0.1μF

The input capacitor plays a part to lower output impedance of a power supply connected to

input terminals (Vcc). When output impedance of this power supply increases, the input

voltages (Vcc, VIN) become unstable and there is a possibility of giving rise to oscillation and

degraded ripple rejection characteristics. The use of capacitors of about 10μF with low ESR,

which provide less capacity value changes caused by temperature changes, is recommended,

but since input capacitor greatly depends on characteristics of the power supply used for input,

substrate wiring pattern, thoroughgoing confirmation under the application temperature and

load range, is requested.

C2

10μF

The input capacitor plays a part to lower output impedance of a power supply connected to

degraded ripple rejection characteristics. The use of capacitors of about 10μF with low ESR,

which provide less capacity value changes caused by temperature changes, is recommended,

but since input capacitor greatly depends on characteristics of the power supply used for input,

substrate wiring pattern, thoroughgoing confirmation under the application temperature and

load range, is requested.

C4

1μF

and R2 values. When EN terminal is “High” or UVLO is reset, output voltage is built up by the

time constant determined by C4, R1, and R2. It is recommended to use capacitors (B

special) with little capacity value change caused by temperature change for C4.

Vcc

Vo

EN

GND

ON/OFF

Ceramic Capacitor

Vcc

R1

C1

C2

C3

C4

R2