74ABT544D datasheet(7/15 Pages) NXP

部品番号	74ABT544D

部品情報	Octal latched transceiver with dual enable; inverting; 3-state

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74ABT544_4

Product data sheet

Rev. 04 — 15 January 2009

7 of 15

NXP Semiconductors

74ABT544

Octal latched transceiver with dual enable; inverting; 3-state

11. Waveforms

tPHL

HIGH to LOW

propagation delay

An to Bn or Bn to An; see Figure 5

2.4

3.6

4.5

2.4

5.2

ns

LEBA to An or LEAB to Bn; see Figure 6

3.0

4.4

5.3

3.0

6.2

ns

tPZH

OFF-state to HIGH

propagation delay

OEBA to An, OEAB to Bn; see Figure 7

1.8

3.0

3.9

1.8

4.7

ns

EBA to An, EAB to Bn; see Figure 7

1.9

3.4

4.1

1.9

5.0

ns

tPZL

OFF-state to LOW

propagation delay

OEBA to An, OEAB to Bn; see Figure 8

2.9

4.2

5.2

2.9

6.1

ns

EBA to An, EAB to Bn; see Figure 8

3.1

4.6

5.5

3.1

6.5

ns

tPHZ

HIGH to OFF-state

propagation delay

OEBA to An, OEAB to Bn; see Figure 7

2.0

3.3

4.3

2.0

4.9

ns

EBA to An, EAB to Bn; see Figure 7

2.1

3.4

4.5

2.1

5.2

ns

tPLZ

LOW to OFF-state

propagation delay

OEBA to An, OEAB to Bn; see Figure 8

2.0

2.8

5.8

2.0

6.3

ns

EBA to An, EAB to Bn; see Figure 8

2.0

3.0

6.2

2.0

6.7

ns

tsu(H)

set-up time HIGH

An to LEAB, Bn to LEBA; see Figure 9

3.0

1.5

-

3.0

-

ns

An to EAB, Bn to EBA; see Figure 9

3.0

1.5

-

3.0

-

ns

tsu(L)

set-up time LOW

An to LEAB, Bn to LEBA; see Figure 9

3.0

0.6

-

3.0

-

ns

An to EAB, Bn to EBA; see Figure 9

3.0

0.6

-

3.0

-

ns

th(H)

hold time HIGH

LEAB to An, LEBA to Bn; see Figure 9

+0.5

−0.3

-

0.5

-

ns

EAB to An, EBA to Bn; see Figure 9

+0.5

−0.2

-

0.5

-

ns

th(L)

hold time LOW

LEAB to An, LEBA to Bn; see Figure 9

+0.5

−1.3

-

0.5

-

ns

EAB to An, EBA to Bn; see Figure 9

+0.5

−1.3

-

0.5

-

ns

tWL

pulse width LOW

latch enable; see Figure 9

3.5

1.8

-

3.5

-

ns

Table 7.

Dynamic characteristics …continued

GND = 0 V; for test circuit, see Figure 10.

Symbol Parameter

Conditions

25

°C; V

CC = 5.0 V

−40 °C to +85 °C;

VCC = 5.0 V ± 0.5 V

Unit

Min

Typ

Max

Min

Max

VM = 1.5 V

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 5.

Propagation delay input (An, Bn) to output (Bn, An)

001aac759

VOL

VOH

VM

tPHL

tPLH

VM

An, Bn

VI

GND

Bn, An

同様の部品番号 - 74ABT544D

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NXP Semiconductors	74ABT544D	115Kb / 19P	Octal latched transceiver with dual enable; inverting; 3-state Rev. 03-20 April 2005
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同様の説明 - 74ABT544D

メーカー	部品番号	データシート	部品情報
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	74ABT544	97Kb / 8P	Octal latched transceiver with dual enable, inverting 3-State Rev. 03-20 April 2005
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