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74LVCH16374DGG データシート(PDF) 11 Page - NXP Semiconductors |
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74LVCH16374DGG データシート(HTML) 11 Page - NXP Semiconductors |
11 / 17 page 74ALVCH16374_3 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 03 — 27 April 2010 11 of 17 NXP Semiconductors 74ALVCH16374 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 12. Test information Table 8. Measurement points Supply voltage Input Output VCC VI VM VM VX VY 2.3 V to 2.7 V and < 2.3 V VCC 0.5 0.5 VOL + 0.15 V VOH − 0.15 V 2.7 V 2.7 V 2.7 V 1.5 V VOL + 0.3 V VOH − 0.3 V 3.0 V to 3.6 V 2.7 V 2.7 V 1.5 V VOL + 0.3 V VOH − 0.3 V Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 9. Load circuit for measuring switching times VEXT VCC VI VO mna616 DUT CL RT RL RL G Table 9. Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 2.3 V to 2.7 V and < 2.3 V VCC ≤ 2.0 ns 30 pF 500 Ω open 2 × V CC GND 2.7 V 2.7 V 2.5 ns 50 pF 500 Ω open 2 × V CC GND 3.0 V to 3.6 V 2.7 V 2.5 ns 50 pF 500 Ω open 2 × V CC GND |
同様の部品番号 - 74LVCH16374DGG |
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同様の説明 - 74LVCH16374DGG |
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