74AUP1G332GM datasheet(1/16 Pages) NXP

1 / 16 page

1.

General description

The 74AUP1G332 is a high-performance, low-power, low-voltage, Si-gate CMOS device,

superior to most advanced CMOS compatible TTL families.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall

times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire

VCC range from 0.8 V to 3.6 V.

This device is fully speciﬁed for partial power-down applications using IOFF.

The IOFF circuitry disables the output, preventing the damaging backﬂow current through

the device when it is powered down.

The 74AUP1G332 provides a single 3-input OR gate.

2.

Features

I Wide supply voltage range from 0.8 V to 3.6 V

I High noise immunity

I Complies with JEDEC standards:

N JESD8-12 (0.8 V to 1.3 V)

N JESD8-11 (0.9 V to 1.65 V)

N JESD8-7 (1.2 V to 1.95 V)

N JESD8-5 (1.8 V to 2.7 V)

N JESD8-B (2.7 V to 3.6 V)

I ESD protection:

N HBM JESD22-A114E Class 3A exceeds 5000 V

N MM JESD22-A115-A exceeds 200 V

N CDM JESD22-C101-C exceeds 1000 V

I Low static power consumption; ICC = 0.9 µA (maximum)

I Latch-up performance exceeds 100 mA per JESD 78 Class II

I Inputs accept voltages up to 3.6 V

I Low noise overshoot and undershoot < 10 % of VCC

I IOFF circuitry provides partial Power-down mode operation

I Multiple package options

I Speciﬁed from −40 °Cto+85 °C and −40 °C to +125 °C

74AUP1G332

Low-power 3-input OR gate

Rev. 02 — 29 February 2008

Product data sheet

同様の部品番号 - 74AUP1G332GM

メーカー	部品番号	データシート	部品情報
NXP Semiconductors	74AUP1G332GM	67Kb / 18P	Low-power 3-input OR gate Rev.01.00-27 February2006
Nexperia B.V. All right...	74AUP1G332GM	252Kb / 16P	Low-power 3-input OR-gate Rev. 7 - 20 January 2022

メーカー	部品番号	データシート	部品情報
NXP Semiconductors	74AUP1G332	67Kb / 18P	Low-power 3-input OR gate Rev.01.00-27 February2006
Nexperia B.V. All right...	74AUP1G332	252Kb / 16P	Low-power 3-input OR-gate Rev. 7 - 20 January 2022
Nexperia B.V. All right...	74AUP1G386	255Kb / 16P	Low-power 3-input EXCLUSIVE-OR gate Rev. 8 - 21 January 2022
NXP Semiconductors	74AUP1G0832	70Kb / 19P	Low-power 3-input AND-OR gate Rev.01.00-26 January2006
Nexperia B.V. All right...	74AUP1G0832	259Kb / 16P	Low-power 3-input AND-OR gate Rev. 6 - 14 January 2022
NXP Semiconductors	74AUP1G0832	95Kb / 16P	Low-power 3-input AND-OR gate Rev. 02-3 July 2009
	74AUP1G3208	94Kb / 16P	Low-power 3-input OR-AND gate Rev. 02-3 July 2009
	74AUP1G3208GF	264Kb / 19P	Low-power 3-input OR-AND gate Rev. 5-22 June 2012
	74AUP1G3208	71Kb / 19P	Low-power 3-input OR-AND gate Rev.01.00-17 January 2006
	74AUP1G386	93Kb / 16P	Low-power 3-input EXCLUSIVE-OR gate Rev. 03-2 July 2009