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74AUP2G07GM データシート(PDF) 2 Page - NXP Semiconductors |
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74AUP2G07GM データシート(HTML) 2 Page - NXP Semiconductors |
2 / 15 page 74AUP2G07_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 11 June 2009 2 of 15 NXP Semiconductors 74AUP2G07 Low-power dual buffer with open-drain output 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2G07GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74AUP2G07GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886 74AUP2G07GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm SOT891 Table 2. Marking Type number Marking code[1] 74AUP2G07GW p7 74AUP2G07GM p7 74AUP2G07GF p7 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate) mnb092 1A 1Y 1 6 2A 2Y 3 4 6 1 1A 1Y mnb093 4 3 2A 2Y mna625 A Y GND |
同様の部品番号 - 74AUP2G07GM |
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同様の説明 - 74AUP2G07GM |
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