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74HCT2G126DP データシート(PDF) 7 Page - NXP Semiconductors |
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74HCT2G126DP データシート(HTML) 7 Page - NXP Semiconductors |
7 / 14 page 74HC_HCT2G126_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 24 September 2009 7 of 14 NXP Semiconductors 74HC2G126; 74HCT2G126 Dual buffer/line driver; 3-state 12. Waveforms Measurement points are given in Table 9. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Propagation delay input (nA) to output (nY) and transition time output (nY) mna948 nA input nY output tPHL tPLH GND VI VM VOH VOL tTHL tTLH VM VI 90% 10% Measurement points are given in Table 9. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. Enable and disable times mna949 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH nOE input VOL VOH VCC VI VM GND GND tPZL tPZH VM VM Table 9. Measurement points Type Input Output VM VM VX VY 74HC2G126 0.5VCC 0.5VCC VOL + 0.3 V VOH − 0.3 V 74HCT2G126 1.3 V 1.3 V VOL + 0.3 V VOH − 0.3 V |
同様の部品番号 - 74HCT2G126DP |
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同様の説明 - 74HCT2G126DP |
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