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74LVC2G241DP データシート(PDF) 8 Page - NXP Semiconductors |
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74LVC2G241DP データシート(HTML) 8 Page - NXP Semiconductors |
8 / 18 page 74LVC2G241_9 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 09 — 10 June 2008 8 of 18 NXP Semiconductors 74LVC2G241 Dual buffer/line driver; 3-state [1] Typical values are measured at nominal VCC and at Tamb =25 °C. [2] tpd is the same as tPLH and tPHL. [3] ten is the same as tPZH and tPZL. [4] tdis is the same as tPLZ and tPHZ. [5] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of outputs. 12. Waveforms CPD power dissipation capacitance per buffer; VI = GND to VCC [5] output enabled - 20 - - - pF output disabled - 5 - - - pF Table 8. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. The data input (nA) to output (nY) propagation delays mna230 tPHL tPLH VM VM nA input nY output GND VI VOH VOL Table 9. Measurement points Supply voltage Input Output VCC VM VM VX VY 1.65 V to 1.95 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH − 0.15 V 2.3 V to 2.7 V 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH − 0.15 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V 3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V 4.5 V to 5.5 V 0.5 × VCC 0.5 × V CC VOL + 0.3 V VOH − 0.3 V |
同様の部品番号 - 74LVC2G241DP |
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同様の説明 - 74LVC2G241DP |
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