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74LVC3GU04DP データシート(PDF) 4 Page - NXP Semiconductors |
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74LVC3GU04DP データシート(HTML) 4 Page - NXP Semiconductors |
4 / 17 page 74LVC3GU04_7 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 07 — 11 November 2009 4 of 17 NXP Semiconductors 74LVC3GU04 Triple inverter 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level. 8. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 packages: above 55 °C the value of P tot derates linearly with 2.5 mW/K. For VSSOP8 packages: above 110 °C the value of P tot derates linearly with 8.0 mW/K. For XSON8, XSON8U and XQFN8U packages: above 45 °C the value of P tot derates linearly with 2.4 mW/K. 9. Recommended operating conditions Table 4. Function table[1] Input nA Output nY LH HL Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +6.5 V VI input voltage [1] −0.5 +6.5 V VO output voltage Active mode [1] −0.5 VCC + 0.5 V IIK input clamping current VI <0 V −50 - mA IOK output clamping current VO >VCC or VO <0 V - ±50 mA IO output current VO =0 VtoVCC - ±50 mA ICC supply current - 100 mA IGND ground current −100 - mA Ptot total power dissipation Tamb = −40 °C to +125 °C [2] - 250 mW Tstg storage temperature −65 +150 °C Table 6. Operating conditions Symbol Parameter Conditions Min Max Unit VCC supply voltage 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage Active mode 0 VCC V Power-down mode; VCC = 0 V 0 5.5 V Tamb ambient temperature −40 +125 °C ∆t/∆V input transition rise and fall rate VCC = 1.65 V to 2.7 V - 20 ns/V VCC = 2.7 V to 5.5 V - 10 ns/V |
同様の部品番号 - 74LVC3GU04DP |
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同様の説明 - 74LVC3GU04DP |
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