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CS8422-CNZ データシート(PDF) 1 Page - Cirrus Logic |
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CS8422-CNZ データシート(HTML) 1 Page - Cirrus Logic |
1 / 82 page Copyright Cirrus Logic, Inc. 2010 (All Rights Reserved) http://www.cirrus.com 24-bit, 192-kHz, Asynchronous Sample Rate Converter with Integrated Digital Audio Interface Receiver Sample Rate Converter Features 140 dB Dynamic Range -120 dB THD+N No External Master Clock Required Supports Sample Rates up to 211 kHz Input/Output Sample Rate Ratios from 6:1 to 1:6 Master Mode Master Clock/Sample Rate Ratio Support: 64, 96, 128, 192, 256, 384, 512, 768, 1024 16, 18, 20, or 24-bit Data I/O Dither Automatically Applied and Scaled to Output Resolution Multiple Device Outputs are Phase Matched Digital Audio Interface Receiver Features Complete EIAJ CP1201, IEC-60958, AES3, S/PDIF Compatible Receiver 28 kHz to 216 kHz Sample Rate Range 2:1 Differential AES3 or 4:1 S/PDIF Input Mux De-emphasis Filtering for 32 kHz, 44.1 kHz, and 48 kHz Recovered Master Clock Output: 64 x Fs, 96 x Fs, 128 x Fs, 192 x Fs, 256 x Fs, 384 x Fs, 512 x Fs, 768 x Fs, 1024 x Fs 49.152 MHz Maximum Recovered Master Clock Frequency Ultralow-jitter Clock Recovery High Input Jitter Tolerance No External PLL Filter Components Required Selectable and Automatic Clock Switching AES3 Direct Output and AES3 TX Pass- through On-chip Channel Status Data Buffering Automatic Detection of Compressed Audio Streams Decodes CD Q Sub-Code Serial Audio Input 4:1 MUX RX0/RXP0 RX1/RXN0 RX2/RXP1 RX3/RXN1 Receiver Clock & Data Recovery (PLL) ILRCK ISCLK SDIN Sample Rate Converter C or U Data Buffer (First 5 Bytes) Control Port & Registers 2:1 MUX Serial Audio Output 3:1 MUX XTI Clock Generator SDA/ CDOUT SCL/ CCLK AD1/ CDIN AD0/ CS RMCK General Purpose Outputs GPO0 Format Detect GPO1 GPO2 GPO3 OLRCK1 OSCLK1 SDOUT1 TDM_IN Serial Audio Output 3:1 MUX OLRCK2 OSCLK2 SDOUT2 VL VA AGND XTO Level Translators Level Translators DGND V_REG FEB '10 DS692F1 CS8422 |
同様の部品番号 - CS8422-CNZ |
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同様の説明 - CS8422-CNZ |
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