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LM3S6633-IBZ50-A2T データシート(PDF) 4 Page - Texas Instruments

部品番号 LM3S6633-IBZ50-A2T
部品情報  Stellaris LM3S6633 Microcontroller
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

LM3S6633-IBZ50-A2T データシート(HTML) 4 Page - Texas Instruments

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6.1.2
Reset Control ................................................................................................................ 64
6.1.3
Power Control ............................................................................................................... 67
6.1.4
Clock Control ................................................................................................................ 69
6.1.5
System Control ............................................................................................................. 72
6.2
Initialization and Configuration ....................................................................................... 73
6.3
Register Map ................................................................................................................ 73
6.4
Register Descriptions .................................................................................................... 74
7
Hibernation Module .............................................................................................. 125
7.1
Block Diagram ............................................................................................................ 126
7.2
Functional Description ................................................................................................. 126
7.2.1
Register Access Timing ............................................................................................... 126
7.2.2
Clock Source .............................................................................................................. 127
7.2.3
Battery Management ................................................................................................... 128
7.2.4
Real-Time Clock .......................................................................................................... 128
7.2.5
Non-Volatile Memory ................................................................................................... 129
7.2.6
Power Control ............................................................................................................. 129
7.2.7
Initiating Hibernate ...................................................................................................... 129
7.2.8
Interrupts and Status ................................................................................................... 130
7.3
Initialization and Configuration ..................................................................................... 130
7.3.1
Initialization ................................................................................................................. 130
7.3.2
RTC Match Functionality (No Hibernation) .................................................................... 130
7.3.3
RTC Match/Wake-Up from Hibernation ......................................................................... 131
7.3.4
External Wake-Up from Hibernation .............................................................................. 131
7.3.5
RTC/External Wake-Up from Hibernation ...................................................................... 131
7.4
Register Map .............................................................................................................. 131
7.5
Register Descriptions .................................................................................................. 132
8
Internal Memory ................................................................................................... 145
8.1
Block Diagram ............................................................................................................ 145
8.2
Functional Description ................................................................................................. 145
8.2.1
SRAM Memory ............................................................................................................ 145
8.2.2
Flash Memory ............................................................................................................. 146
8.3
Flash Memory Initialization and Configuration ............................................................... 147
8.3.1
Flash Programming ..................................................................................................... 147
8.3.2
Nonvolatile Register Programming ............................................................................... 148
8.4
Register Map .............................................................................................................. 149
8.5
Flash Register Descriptions (Flash Control Offset) ......................................................... 149
8.6
Flash Register Descriptions (System Control Offset) ...................................................... 157
9
General-Purpose Input/Outputs (GPIOs) ........................................................... 170
9.1
Functional Description ................................................................................................. 170
9.1.1
Data Control ............................................................................................................... 171
9.1.2
Interrupt Control .......................................................................................................... 172
9.1.3
Mode Control .............................................................................................................. 173
9.1.4
Commit Control ........................................................................................................... 173
9.1.5
Pad Control ................................................................................................................. 173
9.1.6
Identification ............................................................................................................... 174
9.2
Initialization and Configuration ..................................................................................... 174
9.3
Register Map .............................................................................................................. 175
9.4
Register Descriptions .................................................................................................. 177
April 05, 2010
4
Texas Instruments-Production Data
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