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LM3S6938-IQN80-A2 データシート(PDF) 4 Page - Texas Instruments |
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LM3S6938-IQN80-A2 データシート(HTML) 4 Page - Texas Instruments |
4 / 559 page 6.1.2 Reset Control ................................................................................................................ 64 6.1.3 Power Control ............................................................................................................... 67 6.1.4 Clock Control ................................................................................................................ 69 6.1.5 System Control ............................................................................................................. 72 6.2 Initialization and Configuration ....................................................................................... 73 6.3 Register Map ................................................................................................................ 73 6.4 Register Descriptions .................................................................................................... 74 7 Hibernation Module .............................................................................................. 128 7.1 Block Diagram ............................................................................................................ 129 7.2 Functional Description ................................................................................................. 129 7.2.1 Register Access Timing ............................................................................................... 129 7.2.2 Clock Source .............................................................................................................. 130 7.2.3 Battery Management ................................................................................................... 131 7.2.4 Real-Time Clock .......................................................................................................... 131 7.2.5 Non-Volatile Memory ................................................................................................... 132 7.2.6 Power Control ............................................................................................................. 132 7.2.7 Initiating Hibernate ...................................................................................................... 132 7.2.8 Interrupts and Status ................................................................................................... 133 7.3 Initialization and Configuration ..................................................................................... 133 7.3.1 Initialization ................................................................................................................. 133 7.3.2 RTC Match Functionality (No Hibernation) .................................................................... 133 7.3.3 RTC Match/Wake-Up from Hibernation ......................................................................... 134 7.3.4 External Wake-Up from Hibernation .............................................................................. 134 7.3.5 RTC/External Wake-Up from Hibernation ...................................................................... 134 7.4 Register Map .............................................................................................................. 134 7.5 Register Descriptions .................................................................................................. 135 8 Internal Memory ................................................................................................... 148 8.1 Block Diagram ............................................................................................................ 148 8.2 Functional Description ................................................................................................. 148 8.2.1 SRAM Memory ............................................................................................................ 148 8.2.2 Flash Memory ............................................................................................................. 149 8.3 Flash Memory Initialization and Configuration ............................................................... 150 8.3.1 Flash Programming ..................................................................................................... 150 8.3.2 Nonvolatile Register Programming ............................................................................... 151 8.4 Register Map .............................................................................................................. 152 8.5 Flash Register Descriptions (Flash Control Offset) ......................................................... 153 8.6 Flash Register Descriptions (System Control Offset) ...................................................... 161 9 General-Purpose Input/Outputs (GPIOs) ........................................................... 174 9.1 Functional Description ................................................................................................. 174 9.1.1 Data Control ............................................................................................................... 175 9.1.2 Interrupt Control .......................................................................................................... 176 9.1.3 Mode Control .............................................................................................................. 177 9.1.4 Commit Control ........................................................................................................... 177 9.1.5 Pad Control ................................................................................................................. 177 9.1.6 Identification ............................................................................................................... 178 9.2 Initialization and Configuration ..................................................................................... 178 9.3 Register Map .............................................................................................................. 179 9.4 Register Descriptions .................................................................................................. 181 April 05, 2010 4 Texas Instruments-Production Data Table of Contents |
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