データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

SN74AHC132NSRE4 データシート(PDF) 2 Page - Texas Instruments

部品番号 SN74AHC132NSRE4
部品情報  QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
Download  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

SN74AHC132NSRE4 データシート(HTML) 2 Page - Texas Instruments

  SN74AHC132NSRE4 Datasheet HTML 1Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 2Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 3Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 4Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 5Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 6Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 7Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 8Page - Texas Instruments SN74AHC132NSRE4 Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 10 page
background image
SN54AHC132, SN74AHC132
QUADRUPLE POSITIVE-NAND GATES
WITH SCHMITT-TRIGGER INPUTS
SCLS365G – MAY 1997 – REVISED SEPTEMBER 2002
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
Each circuit functions as a NAND gate, but because of the Schmitt action, it has different input threshold levels
for positive- and negative-going signals.
These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give
clean jitter-free output signals.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A
B
Y
H
H
L
L
XH
X
L
H
logic diagram, each gate (positive logic)
A
B
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1)
–0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
–20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC)
±25 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): D package
86
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DB package
96
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DGV package
127
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): N package
80
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): NS package
76
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): PW package
113
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): RGY package
47
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.


同様の部品番号 - SN74AHC132NSRE4

メーカー部品番号データシート部品情報
logo
Texas Instruments
SN74AHC132NSRE4 TI-SN74AHC132NSRE4 Datasheet
130Kb / 8P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN74AHC132NSRE4 TI-SN74AHC132NSRE4 Datasheet
184Kb / 11P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
More results

同様の説明 - SN74AHC132NSRE4

メーカー部品番号データシート部品情報
logo
Texas Instruments
SN54AHC132 TI-SN54AHC132_07 Datasheet
184Kb / 11P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54LV132A TI-SN54LV132A_04 Datasheet
318Kb / 11P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54LV132A TI-SN54LV132A Datasheet
333Kb / 13P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54LV132A TI1-SN54LV132A_15 Datasheet
1,005Kb / 24P
[Old version datasheet]   Quadruple Positive-NAND Gates With Schmitt-Trigger Inputs
SN54LV132A TI-SN54LV132A_08 Datasheet
504Kb / 15P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54LV132A TI-SN54LV132A_07 Datasheet
474Kb / 15P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54AHC132 TI-SN54AHC132_08 Datasheet
304Kb / 10P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54AHCT132 TI-SN54AHCT132 Datasheet
95Kb / 6P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54HC132 TI-SN54HC132 Datasheet
513Kb / 15P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54AHC132 TI-SN54AHC132 Datasheet
130Kb / 8P
[Old version datasheet]   QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS
SN54HC132-DIE TI1-SN54HC132-DIE Datasheet
96Kb / 6P
[Old version datasheet]   Quadruple Positive-NAND Gates with Schmitt-Trigger Inputs
More results


Html Pages

1 2 3 4 5 6 7 8 9 10


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com