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LM3S9781-IQR80-C1T データシート(PDF) 6 Page - Texas Instruments |
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LM3S9781-IQR80-C1T データシート(HTML) 6 Page - Texas Instruments |
6 / 1155 page 12.4 Register Map .............................................................................................................. 473 12.5 Register Descriptions .................................................................................................. 474 13 Analog-to-Digital Converter (ADC) ..................................................................... 496 13.1 Block Diagram ............................................................................................................ 497 13.2 Signal Description ....................................................................................................... 498 13.3 Functional Description ................................................................................................. 499 13.3.1 Sample Sequencers .................................................................................................... 499 13.3.2 Module Control ............................................................................................................ 500 13.3.3 Hardware Sample Averaging Circuit ............................................................................. 503 13.3.4 Analog-to-Digital Converter .......................................................................................... 503 13.3.5 Differential Sampling ................................................................................................... 505 13.3.6 Internal Temperature Sensor ........................................................................................ 508 13.3.7 Digital Comparator Unit ............................................................................................... 508 13.4 Initialization and Configuration ..................................................................................... 513 13.4.1 Module Initialization ..................................................................................................... 513 13.4.2 Sample Sequencer Configuration ................................................................................. 514 13.5 Register Map .............................................................................................................. 514 13.6 Register Descriptions .................................................................................................. 516 14 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 573 14.1 Block Diagram ............................................................................................................ 574 14.2 Signal Description ....................................................................................................... 574 14.3 Functional Description ................................................................................................. 576 14.3.1 Transmit/Receive Logic ............................................................................................... 577 14.3.2 Baud-Rate Generation ................................................................................................. 577 14.3.3 Data Transmission ...................................................................................................... 578 14.3.4 Serial IR (SIR) ............................................................................................................. 578 14.3.5 ISO 7816 Support ....................................................................................................... 579 14.3.6 Modem Handshake Support ......................................................................................... 579 14.3.7 LIN Support ................................................................................................................ 581 14.3.8 FIFO Operation ........................................................................................................... 582 14.3.9 Interrupts .................................................................................................................... 582 14.3.10 Loopback Operation .................................................................................................... 583 14.3.11 DMA Operation ........................................................................................................... 583 14.4 Initialization and Configuration ..................................................................................... 584 14.5 Register Map .............................................................................................................. 585 14.6 Register Descriptions .................................................................................................. 586 15 Synchronous Serial Interface (SSI) .................................................................... 635 15.1 Block Diagram ............................................................................................................ 636 15.2 Signal Description ....................................................................................................... 636 15.3 Functional Description ................................................................................................. 637 15.3.1 Bit Rate Generation ..................................................................................................... 638 15.3.2 FIFO Operation ........................................................................................................... 638 15.3.3 Interrupts .................................................................................................................... 638 15.3.4 Frame Formats ........................................................................................................... 639 15.3.5 DMA Operation ........................................................................................................... 646 15.4 Initialization and Configuration ..................................................................................... 647 15.5 Register Map .............................................................................................................. 648 15.6 Register Descriptions .................................................................................................. 649 June 29, 2010 6 Texas Instruments-Advance Information Table of Contents |
同様の部品番号 - LM3S9781-IQR80-C1T |
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同様の説明 - LM3S9781-IQR80-C1T |
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