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データシートサーチシステム |
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データシートサーチシステム |
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TS3DV421DGVRG4 データシート(PDF) 6 Page - Texas Instruments |
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TS3DV421DGVRG4 データシート(HTML) 6 Page - Texas Instruments |
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6 / 19 page  TS3DV421 SCDS264D – JANUARY 2008 – REVISED JANUARY 2010 www.ti.com ELECTRICAL CHARACTERISTICS FOR 1.8-V SUPPLY (1) VDD = 1.5 V to 2.1 V, VSS = 0 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(2) MAX UNIT VIK SEL VDD = 2.1 V, IIN = –18 mA –0.7 –1.2 V IIH SEL VDD = 2.1 V, VIN = VDD ±1 μA IIL SEL VDD = 2.1 V, VIN = VSS ±1 μA Ioff VDD = 0, VO = 0 to 2.1 V, VI = 0 1 μA ICC VDD = 2.1 V, II/O = 0, Switch ON or OFF 230 450 μA CIN SEL f = 1 MHz, VIN = 0 0.7 1 pF COFF B port VI = 0, f = 1 MHz, Outputs open, Switch OFF 1 1.5 pF CON VI = 0, f = 1 MHz, Outputs open, Switch ON 4 4.5 pF ron VDD = 1.8 V, VSS ≤ VI ≤ VDD, IO = –40 mA 12.5 20 Ω ron(flat) (3) VDD = 1.8 V, VI = 1.65 V to 1.8 V IO = –40 mA 0.5 Ω Δron (4) VDD = 1.8 V, VSS ≤ VI ≤ VDD, IO = –40 mA –0.1 0.2 Ω Dynamic XTALK RL = 50 Ω, f = 825 MHz See Figure 7 –50 dB OIRR RL = 50 Ω, f = 825 MHz See Figure 8 –50 dB BW See Figure 6 1.9 GHz Max data rate See Figure 6 3.8 Gbps (1) VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs. (2) All typical values are at VDD = 1.8 V (unless otherwise noted), TA = 25°C. (3) ron(flat) is the difference of ron in a given channel at specified voltages. (4) Δron is the difference of ron from centerports to any other port. SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VDD = 1.5 V to 2.1 V, VSS = 0 V, RL = 200 Ω, CL = 10 pF (unless otherwise noted) FROM TO PARAMETER MIN TYP(1) MAX UNIT (INPUT) (OUTPUT) tpd (2) TMDSn or xTMDSn xTMDSn or TMDSn 0.25 ns tPZH, tPZL SEL TMDSn or xTMDSn 0.5 9 ns tPHZ, tPLZ SEL TMDSn or xTMDSn 0.5 5 ns tsk(o) (3) TMDSn or xTMDSn xTMDSn or TMDSn 0.06 ns tsk(p) (4) 0.06 0.1 ns (1) All typical values are at VDD = 1.8 V (unless otherwise noted), TA = 25°C. (2) The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impedance). (3) Output skew between center port to any other port (4) Skew between opposite transitions of the same output in a given device |tPHL – tPLH| 6 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): TS3DV421 |
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