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SC622 データシート(PDF) 18 Page - Semtech Corporation |
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SC622 データシート(HTML) 18 Page - Semtech Corporation |
18 / 21 page SC622 18 Semwire Interface Functions The SWIF pin is a write-only single wire interface. It provides the capability to address up to 32 registers to control device functionality. The protocol for using this interface is described in the following subsections. Driving the SWIF Pin The SWIF pin should be driven by a GPIO from the system microcontroller. The output level can be configured as either a push-pull driver (TTL or CMOS levels) or as an open drain driver with an external pull-up resistor. Enabling the Device The SWIF pin must be pulled from low to high for a period of greater than 1ms (t EN ) to enable the device into the sleep state. In the sleep state, the device bandgap is active, UVLO monitoring is active, and the serial interface is monitored for communication. Automatic Sleep State Iftheflashcurrentsinkisdisabled,thedeviceautomatically enters the sleep state in order to minimize the current draw from the battery. When in sleep mode, the charge pump and oscillator are both disabled. The LDOs remain on if enabled. Disabling the Device The SWIF pin must be pulled from high to low for a period greater than 10ms (t DIS ) in order to shut down the device. In this state the device remains disabled until the SWIF pin is pulled high for a period greater than 1ms. All registers return to the default state, resetting all bits to zero except for FLT0, which defaults to one. SemWire Communication Protocol and Timing The following six step communication sequence controls all device functions when the device is enabled. OSC On — The SWIF pin is toggled low for one bit duration and high for one bit duration in order to enable the oscillator. The oscillator is turned off in the sleep state to minimize quiescent current. Sample — The SWIF pin is toggled low for one bit duration and high for one bit duration. During this time, the device samples the bit rate and determines the bit rate at which the register address and data values that follow will arrive. The sample rate is at least 20 times the bit rate ensuring robust communication synchronization. Start — The SWIF pin is pulled low for one bit duration, which starts communication with the target register. Address — The next 5 bits are the address of the target register — MSB first, LSB last. Data — The next 8 bits are the data written to the target register — MSB first, LSB last. Standby — After the last data bit is sent, the SWIF pin is pulled high for 5 bit durations to return the device to standby before another data write can take place. If all LEDs are disabled, the device will go back to sleep mode. NOTE: The bit rate must be set by the host controller to a rate that is between the minimum and maximum frequencies listed in the Electrical Characteristics section. 1. 2. 3. 4. 5. 6. SemWire Interface |
同様の部品番号 - SC622_09 |
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同様の説明 - SC622_09 |
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