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EZANPE101M データシート(PDF) 1 Page - Panasonic Semiconductor

部品番号 EZANPE101M
部品情報  Chip Capacitor Networks
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メーカー  PANASONIC [Panasonic Semiconductor]
ホームページ  http://www.panasonic.com/industrial/
Logo PANASONIC - Panasonic Semiconductor

EZANPE101M データシート(HTML) 1 Page - Panasonic Semiconductor

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Chip Capacitor Networks
Design and specifications are each subject to change without notice. Ask factory for the current technical specifications before purchase and/or use.
Should a safety concern arise regarding this product, please be sure to contact us immediately.
I/O
I/O
I/O
I/O
No Through Hole
0.635 mm
Chip Capacitor Network EZANP
Conventional Chip Capacitors
E
1
Product Code
Temperature
Characteristics
Capacitance Value
Suffix for Special
Requirement
Z
2
A
3
N
4
P
5
E
6
1
7
0
8
1
910
11
Capacitance
Tolerance
Thick Film Noise
Suppression and
Filtering Components
8 Capacitors,
Common
terminal type
NP
+20 %/–55 %
(–25
°Cto+85 °C)
E
The first two digits are
significant figures of
capacitance value, and
the third one denotes the
number of zeroes fellow.
ex. 101
100 pF
±20 %
in the case of 22 pF
+30 %
–20 %
M
6.4 mm
3.1 mm
Dimensions and
Circuit Configuration
M
GND
GND
Explanation of Part Numbers
Recommended Applications
● Digital equipment such as PCs, word processors, printers, HDD, PPC, and PDAs
● Digital audio and video equipment such as CD, MD, DAT, digital cameras, digital video and digital TV
● Communication equipment, cordless phones, automobile phones, GSM, PHS, DECT
● Electronic musical instruments, and other digital devices
<Effect of high density placing, PWB space saving>
Features
● Chip Capacitor Networks, exclusively developed by Panasonic using thick film technology.
8 capacitors bussed in one package (6.4 mm
3.1 mm
0.75 mm, 1.27 mm pitch), halfpitch (0.635 mm) spacing
for high density automatic placing
● Excellent noise reduction by connecting both ground terminals and a simple layout pattern (less through hole)
● Excellent mountability using concave terminals, firm solder joint (2 times that of convex terminal), self-aligning placement
during reflow soldering
Chip Capacitor Networks
Type:
EZANP
Feb. 2006


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