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BA7062 データシート(PDF) 5 Page - Rohm |
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BA7062 データシート(HTML) 5 Page - Rohm |
5 / 7 page 5 Multimedia ICs BA7062F •Application example (1) Connect pin 1 to GND via a 120k Ω (approx.) resistor. Leave pins 2, 4 and 8 open. (2) SYNC output polarity (pin 3) is positive. (3) The delay time for rising edge of the SYNC output (pin 3) with respect to the falling edge of Sync for the Vsig input signal (pin 6) is 850ns (reference value). (4) The delay time for falling edge of the SYNC output (pin 3) with respect to the rising edge of Sync for the Vsig input signal (pin 6) is 450ns (reference value). •Attached components Resistor R1 should have a tolerance of ± 2%, and a temperature coefficient of 100ppm or lower. • When SYNC SEPA output only is used. HD and VD unused. Fig. 9 100p C4 R1 R2 470k 130k 10k VD SYNC HD H.OSC PHASE COMP SYNC SEPA 8 7 6 1 2 3 4 C3 10k 1 µ R3 C2 + C5 C6 47 µ 0.022 µ + C7 C1 R4 330 1 µ R5 470k + + + 5 V.SEPA Vsig VCC = 5V VCC = 5V 470k R2 R3 10k 8 C2 C3-2 0.47 µ C3-1 0.47 µ 2200p VCC ∗ By configuring the circuit enclosed in the dotted line to that in the diagram on the right, you can decrease the lock-in time and increase the capture range. ∗ R1 120k 10k VD SYNC HD H.OSC PHASE COMP SYNC SEPA 8 7 6 1 2 3 4 C5 C6 47 µ 0.022 µ + C7 C1 R4 330 1 µ R5 470k + 5 V.SEPA Vsig VCC = 5V VCC = 5V Fig. 10 |
同様の部品番号 - BA7062 |
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同様の説明 - BA7062 |
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