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KM416V1000C データシート(PDF) 7 Page - Samsung semiconductor

部品番号 KM416V1000C
部品情報  1M x 16Bit CMOS Dynamic RAM with Fast Page Mode
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メーカー  SAMSUNG [Samsung semiconductor]
ホームページ  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KM416V1000C データシート(HTML) 7 Page - Samsung semiconductor

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KM416C1000C, KM416C1200C
CMOS DRAM
KM416V1000C, KM416V1200C
NOTES
An initial pause of 200us is required after power-up followed by any 8 RAS-only refresh or CAS-before-RAS refresh cycles
before proper device operation is achieved.
Input voltage levels are Vih/Vil. VIH(min) and VIL(max) are reference levels for measuring timing of input signals.
Transition times are measured between VIH(min) and VIL(max) and are assumed to be 5ns for all inputs.
Measured with a load equivalent to 2 TTL(5V)/1TTL(3.3V) loads and 100pF.
Operation within the
tRCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only.
If
tRCD is greater than the specified tRCD(max) limit, then access time is controlled exclusively by tCAC.
Assumes that tRCD
tRCD(max).
This parameter defines the time at which the output achieves the open circuit condition and is not referenced to Voh or Vol.
tWCS, tRWD, tCWD, tAWD and tCPWD are non restrictive operating parameters. They are included in the data sheet as electrical
characteristics only. If
tWCS
tWCS(min), the cycle is an early write cycle and the data output will remain high impedance for the
duration of the cycle. If
tCWD
tCWD(min), tRWDtRWD(min), tAWDtAWD(min) and tCPWDtCPWD(min), then the cycle is a read-
modify-write cycle and the data output will contain the data read from the selected address. If neither of the above conditions
is satisfied, the condition of the data out is indeterminate.
Either
tRCH or tRRH must be satisfied for a read cycle.
These parameters are referenced to CAS falling edge in early write cycles and to W falling edge in OE controlled write cycle
and read-modify-write cycles.
Operation within the
tRAD(max) limit insures that tRAC(max) can be met. tRAD(max) is specified as a reference point only.
If
tRAD is greater than the specified tRAD(max) limit, then access time is controlled by tAA.
tASC, tCAH are referenced to the earlier CAS falling edge.
tCP is specified from the later CAS rising edge in the previous cycle to the earlier CAS falling edge in the next cycle.
KM416C/V10(2)00C/C-L Truth Table
RAS
LCAS
UCAS
W
OE
DQ0 - DQ7
DQ8-DQ15
STATE
H
X
X
X
X
Hi-Z
Hi-Z
Standby
L
H
H
X
X
Hi-Z
Hi-Z
Refresh
L
L
H
H
L
DQ-OUT
Hi-Z
Byte Read
L
H
L
H
L
Hi-Z
DQ-OUT
Byte Read
L
L
L
H
L
DQ-OUT
DQ-OUT
Word Read
L
L
H
L
H
DQ-IN
-
Byte Write
L
H
L
L
H
-
DQ-IN
Byte Write
L
L
L
L
H
DQ-IN
DQ-IN
Word Write
L
L
L
H
H
Hi-Z
Hi-Z
-
6.
5.
10.
8.
3.
2.
1.
4.
11.
12.
7.
9.


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