データシートサーチシステム |
|
KM48C2000B データシート(PDF) 1 Page - Samsung semiconductor |
|
KM48C2000B データシート(HTML) 1 Page - Samsung semiconductor |
1 / 8 page KM48C2000B, KM48C2100B CMOS DRAM KM48V2000B, KM48V2100B This is a family of 2,097,152 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage (+5.0V or +3.3V), refresh cycle (2K Ref. or 4K Ref.), access time (-5,-6 or -7), power con- sumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS- before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 2Mx8 Fast Page Mode DRAM family is fabricated using Samsung's advanced CMOS process to realize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines. ¡Ü Part Identification - KM48C2000B/B-L (5V, 4K Ref.) - KM48C2100B/B-L (5V, 2K Ref.) - KM48V2000B/B-L (3.3V, 4K Ref.) - KM48V2100B/B-L (3.3V, 2K Ref.) ¡Ü Fast Page Mode operation ¡Ü Byte/Word Read/Write operation ¡Ü CAS-before-RAS refresh capability ¡Ü RAS-only and Hidden refresh capability ¡Ü Self-refresh capability (L-ver only) ¡Ü Fast parallel test mode capability ¡Ü TTL(5V)/LVTTL(3.3V) compatible inputs and outputs ¡Ü Early Write or output enable controlled write ¡Ü JEDEC Standard pinout ¡Ü Available in Plastic SOJ and TSOP(II) packages ¡Ü Single +5V¡¾10% power supply (5V product) ¡Ü Single +3.3V¡¾0.3V power supply (3.3V product) Control Clocks VBB Generator Refresh Timer Refresh Control Refresh Counter Row Address Buffer Col. Address Buffer Row Decoder Column Decoder RAS CAS W Vcc Vss DQ0 to DQ7 A0-A11 (A0 - A10)*1 A0 - A8 (A0 - A9)*1 Memory Array 2,097,152 x 8 Cells SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. 2M x 8Bit CMOS Dynamic RAM with Fast Page Mode DESCRIPTION FEATURES FUNCTIONAL BLOCK DIAGRAM ¡Ü Refresh Cycles Part NO. VCC Refresh cycle Refresh period Normal L-ver C2000B 5V 4K 64ms 128ms V2000B 3.3V C2100B 5V 2K 32ms V2100B 3.3V ¡Ü Performance Range Speed tRAC tCAC tRC tPC Remark -5 50ns 13ns 90ns 35ns 5V/3.3V -6 60ns 15ns 110ns 40ns 5V/3.3V -7 70ns 20ns 130ns 45ns 5V/3.3V ¡Ü Active Power Dissipation Speed 3.3V 5V 4K 2K 4K 2K -5 324 396 495 605 -6 288 360 440 550 -7 252 324 385 495 Unit : mW Data out Buffer Data in Buffer OE Note) *1 : 2K Refresh |
同様の部品番号 - KM48C2000B |
|
同様の説明 - KM48C2000B |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |