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ISL54227 データシート(PDF) 11 Page - Intersil Corporation

部品番号 ISL54227
部品情報  High-Speed USB 2.0 (480Mbps) DPST Switch with Overvoltage Protection (OVP) and Dedicated Charger Port Detection
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メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL54227 データシート(HTML) 11 Page - Intersil Corporation

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ISL54227
11
FN7593.0
July 2, 2010
The OE and LP pins are internally pulled low through a
4MΩ resistor to ground and can be tri-stated or left
floating.
The ISL54227 is designed to minimize IDD current
consumption when the logic control voltage is lower than
the VDD supply voltage. With VDD = 3.6V and the OE
logic pin is at 1.4V the part typically draws only 25µA.
With VDD = 4.3V and the OE logic pin is at 2.6V the part
typically draws only 35µA. Driving the logic pin to the
VDD supply rail minimizes power consumption.
The OE and LP pin can be driven with a voltage higher
than the VDD supply voltage. It can be driven up to
5.25V with a VDD supply in the range of 2.7V to 5.25V.
Low Power Mode
If the OE pin = Logic “0”, and the LP pin = Logic “1” the
switches will turn OFF (high impedance) and the part
will be put in a low power mode. In this mode the part
draws only 10µA (max) of current across the operating
temperature range.
Normal Operation Mode
With a signal level in the range of 0V to 3.6V and with
the LP pin = Logic “0” the switches will be ON when the
OE pin = Logic “1” and will be OFF (high impedance)
when the OE pin = Logic “0”.
USB 2.0 VBUS Short Requirments
The USB specification in section 7.1.1 states a USB
device must be able to withstand a VBUS short (4.4V to
5.25V) or a -1V short to the D+ or D- signal lines when
the device is either powered off or powered on for at
least 24 hours.
The ISL54227 part has special power-off protection and
OVP detection circuitry to meet these short circuit
requirements. This circuitry allows the ISL54227 to
provide protection to the USB down-stream transceiver
connected at its signal pins (D-, D+) to meet the USB
specification short circuit requirements.
The power-off protection and OVP circuitry allows the
COM pins (COM-, COM+) to be driven up to 5.25V or
down to -5V while the VDD supply voltage is in the range
of 0V to 5.25V. In these overvoltage conditions with a
500Ω external VDD resistor the part draws <55µA of
current into the COM pins and causes no stress/damage
to the IC. In addition all switches are OFF and the
shorted VBUS voltage will be isolated from getting
through to the other side of the switch channels, thereby
protecting the USB transceiver.
TABLE 2. LOGIC CONTROL VOLTAGE LEVELS
VDD SUPPLY
RANGE
LOGIC = “0” (LOW)
LOGIC = “1”
(HIGH)
OE
LP
OE
LP
2.7V to 3.6V
≤ 0.5V
or
floating
≤ 0.5V
or
floating
≥1.4V
≥1.4V
3.7V to 4.2V
≤ 0.7V
or
floating
≤ 0.7V
or
floating
≥1.7V
≥1.7V
4.3V to 5.25V
≤ 0.8V
or
floating
≤ 0.8V
or
floating
≥2.0V
≥2.0V
Typical Performance Curves T
A = +25°C, Unless Otherwise Specified
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FIGURE 10. ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
2.9
3.0
3.1
3.2
3.3
3.4
0
0.1
0.2
0.3
0.4
VCOM (V)
2.7V
3.3V
ICOM = 17mA
3.6V
4.3V
5.25V
3.0V
0
2
4
6
8
10
12
14
16
0
0.6
1.2
1.8
2.4
3.0
3.6
VCOM (V)
ICOM = 17mA
2.7V
3.0V
3.3V
5.25V


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