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ISL3241EIRZ データシート(PDF) 8 Page - Intersil Corporation |
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ISL3241EIRZ データシート(HTML) 8 Page - Intersil Corporation |
8 / 16 page 8 FN6768.1 May 13, 2010 Detailed Description The ISL324xE operate from a single +2.7V to +3.6V supply, guarantee a 250kbps minimum data rate, require only four small external 0.1µF capacitors, feature low power consumption, and meet all ElA RS-232 and V.28 specifications even with VCC = 3.0V. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers. Charge-Pump Intersil’s new ISL324xE devices utilize regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate ±5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows them to maintain RS-232 compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings. Transmitters The transmitters are proprietary, low dropout, inverting drivers that translate logic input levels to EIA/TIA-232 output levels. Coupled with the on-chip ±5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages. All transmitter outputs disable and assume a high impedance state when the device enters the power-down mode (see Table 2). These outputs may be driven to ±12V when disabled. The devices guarantee a 250kbps data rate for full load conditions (3k Ω and 1000pF), V CC ≥ 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 200pF, one transmitter easily operates at greater than 1Mbps. The transmitter input switching threshold is set by the voltage applied to the VL pin, so tying VL to a voltage lower than VCC reduces the Tx input VIH and VIL to values compatible with logic ICs (e.g., UARTs and µcontrollers) powered by the VL voltage (see Figure 9 and Table 3). Transmitter inputs float if left unconnected (there are no pull-up resistors), and may cause supply current increases. Connect unused inputs to GND for the best performance. Receivers All the ISL324xE devices contain standard inverting receivers that three-state via the EN or FORCEOFF control lines. Additionally, these products include noninverting “monitor” receivers (denoted by the ROUTB label) that are always active, regardless of the state of any control lines. All the receivers convert RS-232 signals to CMOS output levels, swinging between GND and VL, and accept inputs up to ±25V while presenting the required 3k Ω to 7kΩ input impedance (see Figure 4) even if the power is off (VCC = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. The ISL3241E inverting receivers disable only when EN is driven high. ISL3243E receivers disable during forced (manual) powerdown, but not during automatic powerdown (see Table 2). FIGURE 3A. TEST CIRCUIT FIGURE 3B. MEASUREMENT POINTS FIGURE 3. RECEIVER ENABLE AND DISABLE TIMES Test Circuits and Waveforms (Continued) PARAMETER RIN SW tPHZ and tPZH GND GND tPLZ and tPZL VCC VL R EN RIN VCC SIGNAL GENERATOR CL OR FORCEOFF ROUT VL GND SW 1k Ω OR GND VL FORCEON OR SHDN ROUT VL 0V 50% 50% VOH 0V 50% VOH - 0.3V tPHZ ROUT VL VOL 50% VOL + 0.3V tPLZ FORCEOFF OUTPUT HIGH OUTPUT LOW tPZL tPZH VL 0V 50% 50% EN RXOUT GND ≤ VROUT ≤ VL 5k Ω RXIN -25V ≤ VRIN ≤ +25V GND VL FIGURE 4. INVERTING RECEIVER CONNECTIONS ISL3241E, ISL3243E |
同様の部品番号 - ISL3241EIRZ |
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同様の説明 - ISL3241EIRZ |
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