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ISL54053 データシート(PDF) 7 Page - Intersil Corporation

部品番号 ISL54053
部品情報  Ultra Low ON-Resistance, Low Voltage, Single Supply, SPDT Analog Switch
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メーカー  INTERSIL [Intersil Corporation]
ホームページ  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL54053 データシート(HTML) 7 Page - Intersil Corporation

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7
FN6460.3
October 19, 2009
Detailed Description
The ISL54053 is a bidirectional, single pole/double throw
(SPDT) analog switch which offers precise switching
capability from a single 1.8V to 5.5V supply with low
ON-resistance (0.8Ω) and high speed operation
(tON = 24ns, tOFF = 10ns). The device is especially well
suited for portable battery powered equipment due to its
low operating supply voltage (1.8V), low power
consumption (5.5µW), low leakage currents (300nA
max) and the small µTDFN and SOT-23 packages. The
low on-resistance and rON flatness provide very low
insertion loss and distortion to application that require
signal reproduction.
Supply Sequencing and Overvoltage
Protection
With any CMOS device, proper power supply sequencing
is required to protect the device from excessive input
currents which might permanently damage the IC. All
I/O pins contain ESD protection diodes from the pin to
V+ and to GND (see Figure 8). To prevent forward
biasing these diodes, V+ must be applied before any
input signals, and the input signal voltages must remain
between V+ and GND.
If these conditions cannot be guaranteed, then
precautions must be implemented to prohibit the current
and voltage at the logic pin and signal pins from
exceeding the maximum ratings of the switch. The
following two methods can be used to provided additional
protection to limit the current in the event that the
voltage at a signal pin or logic pin goes below ground or
above the V+ rail.
Logic inputs can be protected by adding a 1kΩ resistor in
series with the logic input (see Figure 8). The resistor
limits the input current below the threshold that
produces permanent damage, and the sub-microamp
input current produces an insignificant voltage drop
during normal operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low rON switch. Connecting schottky
diodes to the signal pins (as shown in Figure 8) will shunt
the fault current to the supply or to ground thereby
protecting the switch. These schottky diodes must be
sized to handle the expected fault current.
FIGURE 4. OFF ISOLATION TEST CIRCUIT
FIGURE 5. rON TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
RL
SIGNAL
GENERATOR
V+
C
0V OR V+
NO OR NC
COM
IN
GND
V+
C
VINL OR VINH
NO OR NC
COM
IN
GND
VNX
V1
rON = V1/100mA
100mA
0V OR V+
ANALYZER
V+
C
NO OR NC
SIGNAL
GENERATOR
RL
GND
IN1
COM
NC OR NO
50
Ω
V+
C
GND
NO or NC
COM
IN
IMPEDANCE
ANALYZER
VINL OR VINH
ISL54053


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