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74LVCH2T45GD データシート(PDF) 11 Page - NXP Semiconductors

部品番号 74LVCH2T45GD
部品情報  Dual supply translating transceiver; 3-state
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メーカー  PHILIPS [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVCH2T45GD データシート(HTML) 11 Page - NXP Semiconductors

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74LVC_LVCH2T45
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 20 August 2010
11 of 36
NXP Semiconductors
74LVC2T45; 74LVCH2T45
Dual supply translating transceiver; 3-state
[1]
CPD is used to determine the dynamic power dissipation (PD in μW).
PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(C
L × VCC
2
× f
o) = sum of the outputs.
[2]
fi = 10 MHz; VI =GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω.
Table 11.
Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C [1][2]
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VCC(A) and VCC(B)
Unit
1.8 V
2.5 V
3.3 V
5.0 V
CPD
power dissipation
capacitance
A port: (direction A to B);
B port: (direction B to A)
23
34
pF
A port: (direction B to A);
B port: (direction A to B)
15
16
16
18
pF
Table 12.
Dynamic characteristics for temperature range
−40 °C to +85 °C
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8.
Symbol Parameter
Conditions
VCC(B)
Unit
1.5 V
± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
VCC(A) = 1.4 V to 1.6 V
tPLH
LOW to HIGH
propagation delay
A to B
2.8
21.3
2.4
17.6
2.0
13.5
1.7
11.8
1.6
10.5
ns
B to A
2.8
21.3
2.6
19.1
2.3
14.9
2.3
12.4
2.2
12.0
ns
tPHL
HIGH to LOW
propagation delay
A to B
2.6
19.3
2.2
15.3
1.8
11.8
1.7
10.9
1.7
10.8
ns
B to A
2.6
19.3
2.4
17.3
2.3
13.2
2.2
11.3
2.3
11.0
ns
tPHZ
HIGH to OFF-state
propagation delay
DIR to A
3.0
18.7
3.0
18.7
3.0
18.7
3.0
18.7
3.0
18.7
ns
DIR to B
3.5
24.8
3.5
23.6
3.0
11.0
3.3
11.3
2.8
10.3
ns
tPLZ
LOW to OFF-state
propagation delay
DIR to A
2.4
11.4
2.4
11.4
2.4
11.4
2.4
11.4
2.4
11.4
ns
DIR to B
2.8
18.3
3.0
17.2
2.5
9.4
3.0
10.1
2.5
9.4
ns
tPZH
OFF-statetoHIGH
propagation delay
DIR to A
[1]
-
39.6
-
36.3
-
24.3
-
22.5
-
21.4
ns
DIR to B
[1]
-
32.7
-
29.0
-
24.9
-
23.2
-
21.9
ns
tPZL
OFF-state to LOW
propagation delay
DIR to A
[1]
-
44.1
-
40.9
-
24.2
-
22.6
-
21.3
ns
DIR to B
[1]
-
38.0
-
34.0
-
30.5
-
29.6
-
29.5
ns
VCC(A) = 1.65 V to 1.95 V
tPLH
LOW to HIGH
propagation delay
A to B
2.6
19.1
2.2
17.7
2.2
9.3
1.7
7.2
1.4
6.8
ns
B to A
2.4
17.6
2.2
17.7
2.3
16.0
2.1
15.5
1.9
15.1
ns
tPHL
HIGH to LOW
propagation delay
A to B
2.4
17.3
2.0
14.3
1.6
8.5
1.8
7.1
1.7
7.0
ns
B to A
2.2
15.3
2.0
14.3
2.1
12.9
2.0
12.6
1.8
12.2
ns
tPHZ
HIGH to OFF-state
propagation delay
DIR to A
2.9
17.1
2.9
17.1
2.9
17.1
2.9
17.1
2.9
17.1
ns
DIR to B
3.2
24.1
3.2
21.9
2.7
11.5
3.0
10.3
2.5
8.2
ns
tPLZ
LOW to OFF-state
propagation delay
DIR to A
2.4
10.5
2.4
10.5
2.4
10.5
2.4
10.5
2.4
10.5
ns
DIR to B
2.5
17.6
2.6
16.0
2.2
9.2
2.7
8.4
2.4
7.1
ns


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