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LC66406A データシート(PDF) 10 Page - Sanyo Semicon Device |
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LC66406A データシート(HTML) 10 Page - Sanyo Semicon Device |
10 / 21 page Electrical Characteristics at Ta = –30 to +70°C, VSS = 0 V, VDD = 2.5 to 5.5 V unless otherwise specified. No. 5484-10/21 LC66354C, 66356C, 66358C Parameter Symbol Conditions min typ max Unit Note P2, P3 (except for the P33/HOLD pin), IIH1 P4, P5, and P6: VIN = 13.5 V, with the output 5.0 µA 1 Nch transistor off Input high-level current IIH2 P0, P1, PC, OSC1, RES, P33/HOLD: 1.0 µA 1 VIN = VDD, with the output Nch transistor off IIH3 PD, PE, PC2, PC3: VIN = VDD, 1.0 µA 1 with the output Nch transistor off IIL1 Input ports other than PD, PE, PC2, and PC3: –1.0 µA 2 Input low-level current VIN = VSS, with the output Nch transistor off IIL2 PC2, PC3, PD, PE: VIN = VSS, –1.0 µA 2 with the output Nch transistor off P2, P3 (except for the P33/HOLD pin), V DD – 1.0 V OH1 P6, and PC: IOH = –1 mA V3 P2, P3 (except for the P33/HOLD pin), V DD – 0.5 Output high-level voltage P6, and PC: IOH = –0.1 mA V OH2 P0, P1, P4, P5: IOH = –50 µA VDD – 1.0 V4 P0, P1, P4, P5: IOH = –30 µA VDD – 0.5 Output pull-up current IPO P0, P1, P4, P5: VIN = VSS, VDD = 5.5 V –1.6 mA 4 VOL1 P0, P1, P2, P3, P4, P5, P6, and PC 0.4 V 5 Output low-level voltage (except for the P33/HOLD pin): IOL = 1.6 mA VOL2 P0, P1, P2, P3, P4, P5, P6, and PC 1.5 V (except for the P33/HOLD pin): IOL = 8 mA Output off leakage current IOFF1 P2, P3, P4, P5, P6: VIN = 13.5 V 5.0 µA 5 IOFF2 P0, P1, PC: VIN = VDD 1.0 µA 5 VOFF1 PD1 to PD3: VIN = VSS to VDD – 1.5 V, ±50 ±300 mV Comparator offset voltage VDD = 3.0 to 5.5 V VOFF2 PD0: VIN = 1.5 to VDD, VDD = 3.0 to 5.5 V ±50 ±300 mV [Schmitt characteristics] Hysteresis voltage VHIS 0.1 VDD High-level threshold voltage Vt H P2, P3, P5, P6, OSC1 (EXT), RES 0.5 VDD 0.8 VDD V Low-level threshold voltage Vt L 0.2 VDD 0.5 VDD V [Ceramic oscillator] Oscillator frequency fCF OSC1, OSC2: Figure 2, 4 MHz 4.0 MHz Oscillator stabilization time fCFS Figure 3, 4 MHz 10 ms [Serial clock] Cycle time Input t CKCY 0.9 µs Output 2.0 Tcyc Low-level and high-level Input tCKL 0.4 µs pulse widths Output tCKH 1.0 Tcyc Rise an fall times Output tCKR, tCKF 0.1 µs [Serial input] Data setup time tICK 0.3 µs Data hold time tCKI 0.3 µs [Serial output] SO0, SO1: With the timing of Figure 4 and Output delay time tCKO the test load of Figure 5. Stipulated with respect 0.3 to the falling edge ( ↓) of SCK0 or SCK1. SI0, SI1: With the timing of Figure 4. Stipulated with respect to the rising edge ( ↑) of SCK0 or SCK1. SCK0, SCK1: With the timing of Figure 4 and the test load of Figure 5. Continued on next page. |
同様の部品番号 - LC66406A |
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同様の説明 - LC66406A |
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