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LC867112 データシート(PDF) 8 Page - Sanyo Semicon Device |
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LC867112 データシート(HTML) 8 Page - Sanyo Semicon Device |
8 / 21 page LC86P7148 No.6692-8/21 Pin name I/O Function description Option PROM mode PORT A (S0/PA0 – S7/PA7) I/O • Segment output terminal for LCD display • Can be used as a general input/output port - Address input A0 to A7 PORT B (S8/PB0 – S13/PB5) I/O • Segment output terminal for LCD display • Can be used as a general input/output port - Address input A8 to A13 PORT C (S16/PC0 – S23/PC7) I/O • Segment output terminal for LCD display • Can be used as a general input/output port - PROM control signal input •TA(*5) Address input •A14,A15 PORT D (S24/PD0 – S31/PD7) I/O • Segment output terminal for LCD display • Can be used as a general input/output port - PORT L (COM0/PL0– COM3/PL3) I/O • Common output terminal for LCD display • Can be used as a general input port - V1/PL4 – V3/PL6 I • Bias power terminal for LCD drive • Can be used as a general input port - RES I Reset pin - XT1/ P74 I • Input pin for 32.768kHz crystal oscillation In case of non use, connect to VDD. • Other function A general input port P74 - XT2/P75 O ( I ) • Output pin for 32.768kHz crystal oscillation In case of non use, should be left unconnected • Other function A general input port P75 - CF1 I Input pin for ceramic resonator oscillation - CF2 O Output pin for ceramic resonator oscillation - * All of port options can be specified in bit unit except the pull-up resistor of port 0. [Notes] • The VDD1, VDD2 and VDD3 terminals must be shorted electrically each other. • The VSS1, VSS2 and VSS3 terminals must be shorted electrically each other. *1 Connect like the following figure to reduce noise into a VDD terminals. *2 Memory select input for data security *3 Output enable input *4 Chip enable input *5 TA ! PROM control signal input Power Supply VDD1 VDD2 LSI VDD3 VSS1 VSS2 VSS3 |
同様の部品番号 - LC867112 |
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同様の説明 - LC867112 |
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