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LC895127 データシート(PDF) 6 Page - Sanyo Semicon Device |
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LC895127 データシート(HTML) 6 Page - Sanyo Semicon Device |
6 / 8 page No. 6236-6/8 LC895127, 895127K Continued from preceding page. Pin No. Pin I/O Function 108 VSS1 P 109 VDD P 110 VSS0 P 111 RAS0 O Buffer RAM RAS signal output 0 112 VDD P 113 CAS0 O Buffer RAM CAS signal output 0 (Normally held fixed at 0 (low).) 114 CAS1 O Buffer RAM RAS signal output 1 115 OE O Buffer RAM output enable 116 UWE (RA9) O Buffer RAM upper write enable (RA9 when 8M or more DRAM is used.) 117 LWE O Buffer RAM lower write enable 118 VSS0 P 119 RA0 O 120 RA1 O 121 RA2 O 122 RA3 O Buffer RAM address signal outputs 123 RA4 O 124 RA5 O 125 RA6 O 126 VDD P 127 VSS0 P 128 RA7 O Buffer RAM address signal outputs 129 RA8 O 130 IO15 B 131 IO14 B 132 IO13 B 133 IO12 B Buffer RAM data I/O 134 IO11 B These pins have built-in pull-up resistors. 135 IO10 B 136 IO9 B 137 IO8 B 138 VSS0 P 139 IO7 B 140 IO6 B Buffer RAM data I/O 141 IO5 B These pins have built-in pull-up resistors. 142 IO4 B 143 IO3 B 144 VDD P Unused ("NC") pins must be left open. Pins whose name is under a bar operate with inverted (negative) logic. VSS0 is the logic system ground and VSS1 is the SCSI interface driver ground. If DRAM is used, applications must adopt measures to prevent undershoot and other DRAM problems. Such measures include inserting resistors in the RAS and CAS lines and inserting capacitors between VSS pins. See the article on Designing with the Latest Microcontrollers and Memory in special issue number 25 of Transistor Technology for details on these measures. Since this device includes buffers that sink a current of 48 mA, applications must take adequate noise prevention measures. |
同様の部品番号 - LC895127 |
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同様の説明 - LC895127 |
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