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FAN3216T データシート(PDF) 2 Page - Fairchild Semiconductor

部品番号 FAN3216T
部品情報  Application Review and Comparative Evaluation of Low-Side Gate Drivers
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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AN-6069
APPLICATION NOTE
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.3 • 1/6/10
2
The circuit waveforms for a MOSFET turning on into a
clamped inductive load are illustrated in Figure 2.
V
DD
V
PL
V
TH
I
L
t4
t3
t2
t1
V
DS
I
DS
V
GS
I
G
time
V
O
I
PK
I
PL
Figure 2.
MOSFET Turn on with Inductive Load
Figure 3 indicates the gate current paths active during the
individual intervals of the MOSFET turn -on process.
Figure 3.
Current Paths During MOSFET Turn on
RG represents the series combination of the MOSFET
internal gate resistance along with any series gate resistor.
RHI represents the driver’s internal resistance whose
effective value changes throughout the switching interval.
As shown below, the driver current, IG, is determined by
combining information presented in references [1] and [2].
During interval t1, IG increases quickly and charges the
combination of CGS and CGD to the gate threshold voltage
VTH through the path shown in Figure 3(a). In this interval,
the MOSFET carries no inductor current.
As interval t2 begins, the MOSFET starts to conduct current
in the linear mode as:
)
V
V
(
g
I
TH
GS
m
D
=
(1)
through the current paths shown in Figure 3(b). The parallel
combination of CGD and CGS are charged from the threshold
voltage to a plateau level given by
TH
m
D
PL
V
g
I
V
+
=
(2)
as the drain current rises from zero to IL. QGS2 is the charge
needed during this transition and can be determined from the
MOSFET datasheet characteristic curves, as illustrated in
the application example presented later in this section. QGS2
allows calculation of the time required for this transition as:
G
2
GS
rise
,
IDS
I
Q
t
2
t
=
=
(3)
Throughout t2, VDS remains at VOUT, clamped by diode D.
At the end of t2, the MOSFET conducts the full IL current
and the diode commutates.
As interval t3 commences, the gate current flows through
CGD and the MOSFET channel as shown in Figure 3(c). All
of IG is used to discharge CGD as VGS remains at VPL, and
VDS begins to fall with a time period given by:
G
GD
fall
,
VDS
I
Q
t
3
t
=
=
(4)
In interval t4, IG flows through a combination of CGS, CGD,
and the decreasing channel resistance RDS, as shown in
Figure 3(d). During t4, the gate-source voltage rises from
the plateau level to VDD. This allows determination of the
total gate charge QG,T required to turn on the MOSFET.
As the drain current rises during t2 and VDS falls during t3,
the MOSFET has simultaneous high voltage across it and
high current flowing through it, so the instantaneous power
can be very high. An equation relating IG to the switching
loss during the turn on interval is:
()
+
×
=
3
t
,
G
GD
2
t
,
G
2
GS
SW
LOAD
IN
ON
,
SW
I
Q
I
Q
f
2
I
V
P
(5)
This equation shows the importance of the magnitude of IG
in relation to the switching losses. Unfortunately, there are
no formal equations to calculate the current available from a
given driver as the output voltage swings throughout its
range. Empirical methods can determine the value of IG at
different driver output voltage levels and are presented in
the section “Evaluating Drivers on the Bench” below.


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