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FAN6747 データシート(PDF) 2 Page - Fairchild Semiconductor

部品番号 FAN6747
部品情報  Control a Flyback Power Supply with Peak Current Output
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メーカー  FAIRCHILD [Fairchild Semiconductor]
ホームページ  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN6747 データシート(HTML) 2 Page - Fairchild Semiconductor

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AN-6747
APPLICATION NOTE
© 2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.1 • 9/16/10
2
2. Design Considerations
Flyback converters have two operation modes; continuous
conduction mode (CCM) and discontinuous conduction
mode (DCM). CCM and DCM each have advantages and
disadvantages. In general, DCM provides better switching
conditions for the rectifier diodes, since the diodes are
operating at zero current just before becoming reverse
biased and the reverse recovery loss is minimized. The
transformer size can be reduced using DCM because the
average energy storage is low compared to CCM. However,
DCM causes high RMS current, which increases the
conduction loss of the MOSFET severely for low line
condition. Thus, especially for applications with peak load
profile, such as printer and scanner; it is typical to design
the converter such that the converter operates in CCM for
low line and peak load condition to maximize efficiency.
In this section, a design procedure is presented using the
schematic of Figure 1 as a reference. An offline SMPS with
20W/32V nominal output power and 70W/32V peak output
power has been selected as a design example.
[STEP-1] Define the System Specifications
Designing a power supply with peak load current profile,
the following specifications should be determined first:
Line voltage range (VLINE
MIN and VLINEMAX)
Line frequency (fL)
Nominal output power (PNO)
Peak output power (PPO) and its duration (tPO)
Estimated efficiencies for nominal load (
ηN) and peak
load (
ηP).
The power conversion efficiency must be estimated to
calculate the input powers for each condition. Typically,
the efficiency at peak load condition is lower than that
of nominal load since most of the components of power
supply are selected for nominal load condition.
If no reference data is available, set
ηN = 0.7~0.75 and
ηP = 0.65~0.7 for low-voltage output applications and
ηN = 0.8~0.85 and ηP = 0.75~0.8 for high-voltage
output applications.
With the estimated efficiency, the input power for peak
load condition is given by:
P
PO
INP
P
P
η
=
(1)
The input power for nominal load condition is given
by:
N
NO
INN
P
P
η
=
(2)
(Design Example)
The specifications of the target
system are:
VLINE
MIN =90VRMS, VLINEMAX=264VRMS
Line frequency (fL) = 60Hz
Nominal output power (PNO) = 20W (32V/0.625A)
Peak output power (PPO) = 70W (32V/2.187A)
Peak load duration (tPO) < 100ms
Estimated efficiency:
ηN = 0.87 and ηP = 0.83
W
84
83
.
0
70
P
P
P
PO
INP
=
=
η
=
W
23
87
.
0
20
P
P
N
NO
INN
=
=
η
=
FAN6747 can be used for this application because the
peak load duration is less than the OCP delay time of
220ms.
[STEP-2] Determine the Input Capacitor (CIN) and
the Input Voltage Range
It is typical to select the input capacitor as 1.5~2
μF per watt
of peak input power for universal input range (85-265VRMS)
and 0.7~0.8
μF per watt of peak input power for European
input range (195V-265VRMS). With the input capacitor
chosen, the minimum input capacitor voltage at peak load
condition is obtained as:
(
)
()
L
IN
CH
INP
2
MIN
LINE
MIN
INP
f
C
D
1
P
V
2
V
=
(3)
The minimum input capacitor voltage at nominal load
condition is obtained as:
(
)
()
L
IN
CH
INN
2
MIN
LINE
MIN
INN
f
C
D
1
P
V
2
V
=
(4)
where D
CH is the input capacitor charging duty ratio defined
as shown in Figure 2, which is typically about 0.2.
The maximum input capacitor voltage is given as:
MAX
LINE
MAX
IN
V
2
V
=
(5)
Figure 2.
Input Capacitor Voltage Waveform


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