FAN6206 datasheet(5/15 Pages) FAIRCHILD

部品番号	FAN6206

部品情報	Highly Integrated Dual-Channel Synchronous Rectification Controller

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メーカー	FAIRCHILD [Fairchild Semiconductor]

ホームページ	http://www.fairchildsemi.com

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FAN6206 • Rev. 1.0.2

5

Electrical Characteristics

VDD=20V, TA=25 , unless otherwise specified.

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

VDD Section

VOP

Continuously Operating Voltage

25

V

VTH-ON1

Turn-On Threshold Voltage

8.0

8.5

9.0

V

VTH-ON2

Turn-On Threshold Voltage

8.0

8.5

9.0

V

VTH-OFF1

Turn-Off Threshold Voltage

7.0

7.5

8.0

V

VTH-OFF2

Turn-Off Threshold Voltage

7.0

7.5

8.0

V

IDD-OP

Operating Current

VDD=15V, DET=50KHz

3

5

mA

IDD-ST

Startup Current

VDD = 7.5V

340

500

μA

VDD-OVP1

VDD Over-Voltage Protection 1

20

21

22

V

VDD-OVP2

VDD Over-Voltage Protection 2

20

21

22

V

VDD-OVP-HYS1

Hysteresis Voltage for VDD OVP 1

1.2

1.7

2.2

V

VDD-OVP-HYS2

Hysteresis Voltage for VDD OVP 2

1.2

1.7

2.2

V

tOVP1

VDD OVP Debounce Time 1

40

60

100

μs

tOVP2

VDD OVP Debounce Time 2

40

60

100

μs

Output Drive for SR MOSFET Section

VZ1

Output Voltage Maximum (Clamp) 1

VDD = 20V

12

14

V

VZ2

Output Voltage Maximum (Clamp) 2

VDD = 20V

12

14

V

VOL1

Output Voltage LOW 1

VDD=12V, IO=50mA

0.5

V

VOL2

Output Voltage LOW 2

VDD=12V, IO=50mA

0.5

V

VOH1

Output Voltage HIGH 1

VDD=12V, IO=50mA

9

V

VOH2

Output Voltage HIGH 2

VDD=12V, IO=50mA

9

V

tR1

Rising Time 1

VDD=12V, CL=7nF,

OUT=2V~9V

30

70

120

ns

tR2

Rising Time 2

VDD=12V, CL=7nF,

OUT=2V~9V

30

70

120

ns

tF1

Falling Time1

VDD=12V, CL=7nF,

OUT=9V~2V

20

50

100

ns

tF2

Falling Time 2

VDD=12V, CL=7nF,

OUT=9V~2V

20

50

100

ns

VZ1

Output Voltage Maximum (Clamp)

VDD = 20V

12

14

V

tPD-HIGH-SP1

Propagation Delay to OUT HIGH

tR+tPD,

(Trigger by SP),

|SP-SN|=5V

280

350

450

ns

tPD-HIGH-SP2

280

350

450

tPD-LOW-SN1

Propagation Delay to OUT LOW

tR+tPD,

(Trigger by SN),

|SP-SN|=5V

180

250

350

ns

tPD-LOW-SN2

180

250

350

tPD-LOW-LPC1

Propagation Delay to OUT LOW

tR+tPD,

(Trigger by LPC)

100

150

200

ns

tPD-LOW-LPC2

100

150

200

tON-MAX1

Maximum On Time

12

13

14

μs

tON-MAX2

12

13

14

μs

Continued on the following page…

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