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74LVC2G08GS データシート(PDF) 8 Page - NXP Semiconductors

部品番号 74LVC2G08GS
部品情報  Dual 2-input AND gate
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メーカー  NXP [NXP Semiconductors]
ホームページ  http://www.nxp.com
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74LVC2G08GS データシート(HTML) 8 Page - NXP Semiconductors

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74LVC2G08
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 9 — 20 October 2010
8 of 21
NXP Semiconductors
74LVC2G08
Dual 2-input AND gate
[1]
Typical values are measured at nominal VCC and at Tamb = 25 °C.
[2]
tpd is the same as tPLH and tPHL
[3]
CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(C
L × VCC
2
× f
o) = sum of outputs.
12. Waveforms
CPD
power dissipation
capacitance
per gate; VI = GND to VCC
[3]
-
14.4
-
-
-
pF
Table 8.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8.
Input (nA, nB) to output (nY) propagation delays
mna224
nA, nB input
nY output
tPLH
tPHL
GND
VI
VM
VM
VOH
VOL
Table 9.
Measurement points
Supply voltage
Input
Output
VCC
VM
VM
1.65 V to 1.95 V
0.5VCC
0.5VCC
2.3 V to 2.7 V
0.5VCC
0.5VCC
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
1.5 V
1.5 V
4.5 V to 5.5 V
0.5VCC
0.5VCC


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