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MAX11632EEG+ データシート(PDF) 5 Page - Maxim Integrated Products |
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MAX11632EEG+ データシート(HTML) 5 Page - Maxim Integrated Products |
5 / 22 page 12-Bit, 300ksps ADCs with FIFO and Internal Reference _______________________________________________________________________________________ 5 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Externally clocked conversion 208 SCLK Clock Period tCP Data I/O 100 ns SCLK Pulse Width High tCH 40 ns SCLK Pulse Width Low tCL 40 ns SCLK Fall to DOUT Transition tDOT CLOAD = 30pF 40 ns CS Rise to DOUT Disable tDOD CLOAD = 30pF 40 ns CS Fall to DOUT Enable tDOE CLOAD = 30pF 40 ns DIN to SCLK Rise Setup tDS 40 ns SCLK Rise to DIN Hold tDH 0 ns CS Low to SCLK Setup tCSS0 40 ns CS High to SCLK Setup tCSS1 40 ns CS High After SCLK Hold tCSH1 0 ns CS Low After SCLK Hold tCSH0 0 4 µs tCSPW CKSEL = 00 40 ns CNVST Pulse Width Low CKSEL = 01 1.4 µs Voltage conversion 7 CS or CNVST Rise to EOC Low (Note 7) Reference power-up 65 µs TIMING CHARACTERISTICS (Figure 1) (VDD = +2.7V to +3.6V (MAX11627/MAX11629/MAX11633); VDD = +4.75V to +5.25V (MAX11626/MAX11628/MAX11632), fSAMPLE = 300kHz, fSCLK = 4.8MHz (50% duty cycle), VREF = 2.5V (MAX11627//MAX11629/MAX11633); VREF = 4.096V (MAX11626/ MAX11628/MAX11632), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) INTEGRAL NONLINEARITY vs. OUTPUT CODE OUTPUT CODE (DECIMAL) 3072 2048 1024 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 MAX11626/MAX11628/MAX11632 fSAMPLE = 300ksps INTEGRAL NONLINEARITY vs. OUTPUT CODE OUTPUT CODE (DECIMAL) 3072 2048 1024 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 MAX11627/MAX11629/MAX11633 fSAMPLE = 300ksps DIFFERENTIAL NONLINEARITY vs. OUTPUT CODE OUTPUT CODE (DECIMAL) 3072 2048 1024 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 04096 MAX11626/MAX11628/MAX11632 fSAMPLE = 300ksps Typical Operating Characteristics (VDD = +3V, VREF = +2.5V, fSCLK = 4.8MHz, CLOAD = 30pF, TA = +25°C, unless otherwise noted.) Note 7: This time is defined as the number of clock cycles needed for conversion multiplied by the clock period. If the internal refer- ence needs to be powered up, the total time is additive. |
同様の部品番号 - MAX11632EEG+ |
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同様の説明 - MAX11632EEG+ |
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