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FM24V10 データシート(PDF) 8 Page - Ramtron International Corporation

部品番号 FM24V10
部品情報  1Mb Serial 3V F-RAM Memory
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メーカー  RAMTRON [Ramtron International Corporation]
ホームページ  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM24V10 データシート(HTML) 8 Page - Ramtron International Corporation

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FM24V10 - 1Mb I2C FRAM
Rev. 2.0
May 2010
Page 8 of 16
Sleep Mode
A low power mode called Sleep Mode is
implemented on both FM24V10 and FM24VN10
devices. The device will enter this low power state
when the Sleep command 0x86 is clocked-in. Sleep
Mode entry can be entered as follows:
1. The master sends a START command.
2. The master sends Reserved Slave ID 0xF8
3. The master sends the I2C-bus slave address of
the slave device it needs to identify. The last
two bits are ‘Don’t care’ values (Page Select
and R/W bits). Only one device must
acknowledge this byte (the one that has the
I2C-bus slave address).
4. The master sends a Re-START command.
5. The master sends Reserved Slave ID 0x86
6. The FM24V10 sends an ACK.
7. The master sends STOP to ensure the device
enters sleep mode.
Once in sleep mode, the device draws IZZ current, but
the device continues to monitor the I2C pins. Once
the master sends a Slave Address that the FM24V10
identifies, it will “wakeup” and be ready for normal
operation within tREC (400
µs max.). As an alternative
method of determining when the device is ready, the
master can send read or write commands and look for
an ACK. While the device is waking up, it will
NACK the master until it is ready.
S
A P
By Master
By FM24V10
Start
Address
Stop
S
A
Rsvd Slave ID (F8)
Slave Address
A
Start
Address
Acknowledge
Rsvd Slave ID (86)
XX
Figure 12. Sleep Mode Entry


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