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STEF05 データシート(PDF) 8 Page - STMicroelectronics |
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STEF05 データシート(HTML) 8 Page - STMicroelectronics |
8 / 20 page Typical application STEF05 8/20 Doc ID 019055 Rev 4 5 Typical application Figure 3. Application circuit Figure 4. Typical HDD application circuit 5.1 Operating modes 5.1.1 Turn-on When the input voltage is applied, the Enable/Fault pin goes up to the high state, enabling the internal control circuitry. After an initial delay time of typically 500 µs, the output voltage is supplied with a slope defined by the internal dv/dt circuitry. If no additional capacitor is connected to dv/dt pin, the total time from the Enable signal going high and the output voltage reaching the nominal value is around 1 ms (refer to Figure 5, 15). AM09868v1 AM09869v1 |
同様の部品番号 - STEF05 |
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同様の説明 - STEF05 |
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