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ADM2914 データシート(PDF) 9 Page - Analog Devices

部品番号 ADM2914
部品情報  Quad UV/OV Positive/Negative
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ADM2914
Rev. B | Page 9 of 16
MONITORING PIN CONNECTIONS
Positive Voltage Monitoring Scheme
When monitoring a positive supply, the desired nominal
operating voltage for monitoring is denoted by VM, IM is the
nominal current through the resistor divider, VOV is the
overvoltage trip point, and VUV is the undervoltage trip point.
0.5V
UVx
VHx
VM
VLx
OVx
ADM2914
RX
VPH
VPL
RZ
RY
Figure 17. Positive Undervoltage/Overvoltage Monitoring Configuration
Figure 17 illustrates the positive voltage monitoring input connec-
tion. Three external resistors, RX, RY, and RZ, divide the positive
voltage for monitoring, VM, into high-side voltage, VPH, and
low-side voltage, VPL. The high-side voltage is connected to the
corresponding VHx pin, and the low-side voltage is connected
to the corresponding VLx pin.
To trigger an overvoltage condition, the low-side voltage (in this
case, VPL) must exceed the 0.5 V threshold on the VLx pin. The
low-side voltage, VPL, is given by the following equation:
V
5
.
0
=
⎟⎟
⎜⎜
+
+
=
Z
Y
X
Z
OV
PL
R
R
R
R
V
V
Also,
M
M
Z
Y
X
I
V
R
R
R
=
+
+
Therefore, RZ, which sets the desired trip point for the
overvoltage monitor, is calculated using the following equation:
()
()()
M
OV
M
Z
I
V
V
R
)
5
.
0
(
=
(1)
To trigger the undervoltage condition, the high-side voltage,
VPH, must exceed the 0.5 V threshold on the VHx pin. The
high-side voltage, VPH, is given by the following equation:
V
5
.
0
=
⎟⎟
⎜⎜
+
+
+
=
Z
Y
X
Z
Y
UV
PH
R
R
R
R
R
V
V
Because RZ is already known, RY can be expressed as follows:
( )
()() Z
M
UV
M
Y
R
I
V
V
R
=
)
5
.
0
(
(2)
When RY and RZ are known, RX is calculated using the following
equation:
( )
()
Y
Z
M
M
X
R
R
I
V
R
=
(3)
If VM, IM, VOV, or VUV changes, each step must be recalculated.
Negative Voltage Monitoring Scheme
Figure 18 shows the circuit configuration for negative supply
voltage monitoring. To monitor the negative voltage, a 1 V
reference voltage is required to connect to the end node of the
voltage divider circuit. This reference voltage is generated
internally and is output through the REF pin.
0.5V
OVx
VHx
VM
VLx
UVx
REF
ADM2914
RZ
VNH
VNL
RX
RY
Figure 18. Negative Undervoltage/Overvoltage Monitoring Configuration
The equations described in the Positive Voltage Monitoring
Scheme section need some minor modifications for use with
negative voltage monitoring. The 1 V reference voltage is added
to the overall voltage drop; it must therefore be subtracted from
VM, VUV, and VOV before using each in the previous equations.
To monitor a negative voltage level, the resistor divider circuit
divides the voltage differential level between the 1 V reference
voltage and the negative supply voltage into high-side voltage,
VNH, and low-side voltage, VNL. Similar to the positive voltage
monitoring scheme, the high-side voltage, VNH, is connected to
the corresponding VHX pin, and the low-side voltage, VNL, is
connected to the corresponding VLX pin. Refer to the Voltage
Monitoring Example section for more information.


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