TIMING RESISTANCE

vs

FREQUENCY

100

1k

10k

100k

1M

f − Frequency − Hz

100

40

10

4

1

DEAD TIME

vs

TIMING CAPACITANCE

100

40

10

4

1

100

40

10

4

1

0.4

0.1

2N2222

4.7 k

Ω

1-k

Ω

Error Amplifier Adjust

4.7 k

Ω

5 k

Ω

Adjust

100 k

Ω

0.1

µF

0.1

µF

REF

OUTPUT

GND

1 k

Ω, 1 W

A

TL284xB

TL384xB

VFB

COMP

OUTPUT

GND

TL2843B-Q1

www.ti.com

SLVSAE2A

– JULY 2010 – REVISED FEBRUARY 2012

Open-Loop Laboratory Test Fixture

In the open-loop laboratory test fixture (see Figure 4), high peak currents associated with loads necessitate

careful grounding techniques. Timing and bypass capacitors should be connected close to the GND terminal in a

single-point ground. The transistor and 5-k

Ω potentiometer sample the oscillator waveform and apply an

Figure 4. Open-Loop Laboratory Test Fixture

Copyright

© 2010–2012, Texas Instruments Incorporated

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