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ADC1005S060 データシート(PDF) 4 Page - Integrated Device Technology |
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ADC1005S060 データシート(HTML) 4 Page - Integrated Device Technology |
4 / 18 page ADC1005S060_3 © IDT 2012. All rights reserved. Product data sheet Rev. 03 — 2 July 2012 4 of 18 Integrated Device Technology ADC1005S060 Single 10 bits ADC, up to 60 MHz 7. Pinning information 7.1 Pinning ADC1005S 060TS CLK n.c. TC n.c. VCCA IR AGND D9 n.c. D8 RB D7 RM D6 VI D5 RT D4 OE D3 VCCD D2 DGND D1 VCCO D0 OGND GRAY 014aaa520 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 18 17 20 19 22 21 24 23 26 25 28 27 Fig 2. Pin configuration 7.2 Pin description Table 3. Pin description Symbol Pin Description CLK 1 clock input TC 2 twos complement input (active LOW) VCCA 3 analog supply voltage (5 V) AGND 4 analog ground n.c. 5 not connected RB 6 reference voltage BOTTOM input RM 7 reference voltage MIDDLE input VI 8 analog voltage input RT 9 reference voltage TOP input OE 10 output enable input (active LOW) VCCD 11 digital supply voltage (2.7 V to 3.6 V) DGND 12 digital ground VCCO 13 supply voltage for output stages (2.7 V to 3.6 V) OGND 14 output ground GRAY 15 gray code input (active HIGH) D0 16 data output; bit 0 (Least Significant Bit (LSB)) D1 17 data output; bit 1 D2 18 data output; bit 2 D3 19 data output; bit 3 |
同様の部品番号 - ADC1005S060 |
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同様の説明 - ADC1005S060 |
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