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DAC1408D650 データシート(PDF) 9 Page - Integrated Device Technology

部品番号 DAC1408D650
部品情報  Dual 14-bit DAC; up to 650 Msps; 2?? 4??or 8??interpolating with JESD204A interface
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メーカー  IDT [Integrated Device Technology]
ホームページ  http://www.idt.com
Logo IDT - Integrated Device Technology

DAC1408D650 データシート(HTML) 9 Page - Integrated Device Technology

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DAC1408D650 6
© IDT 2012. All rights reserved.
Product data sheet
Rev. 06 — 2 July 2012
9 of 96
Integrated Device Technology
DAC1408D650
2
, 4 or 8 interpolating DAC with JESD204A
Analog outputs (IOUTAP, IOUTAN, IOUTBP, IOUTBN)
IO(fs)
full-scale output
current
register value = 00h
(see Table 13 and Table 14)
D-
1.6
-
mA
register = default value
(see Table 13 and Table 14)
-20
-
mA
VO
output voltage
compliance range
D
1.8
-
VDDA(3V3) V
Ro
output resistance
D
-
250
-
k
Co
output capacitance
D
-
3
-
pF
EO
offset error variation
C
-
6
-
ppm/
C
EG
gain error variation
C
-
18
-
ppm/
C
Reference voltage output (GAPOUT)
VO(ref)
reference output
voltage
C
1.24
1.29
1.34
V
IO(ref)
reference output
current
external voltage 1.2 V
C
-
40
-
A
VO(ref)
reference output
voltage variation
C-
117
-
ppm/
C
Analog auxiliary outputs (AUXAP, AUXAN, AUXBP and AUXBN)
IO(aux)
auxiliary output current differential outputs
I
-
2.2
-
mA
VO(aux)
auxiliary output
voltage
compliance range
D
0
-
2
V
NDAC(aux)mono
auxiliary DAC
monotonicity
guaranteed
D
-
10
-
bits
Input timing (Vin_p/Vin_n)
fdata
data rate
2
 interpolation
D
-
-
312.5
Msps
4
 interpolation
D
-
-
162.5
Msps
8
 interpolation
D
-
-
81.25
Msps
fbit
bit rate
serial input
D
0.7
-
3.125
Gbps
Output timing (IOUTAP, IOUTAN, IOUTBP, IOUTBN)
fs
sampling rate
D
-
-
650
Msps
ts
settling time
up to 0.5 LSB
D
-
20
-
ns
NCO frequency range; fs = 650 Msps
fNCO
NCO frequency
register value = 00000000h
(see Table 21 to Table 24)
D-
0
-
MHz
register value = FFFFFFFFh
(see Table 21 to Table 24)
D
-
650
-
MHz
fstep
step frequency
D
-
0.151
-
Hz
Low power NCO frequency range; fs = 650 Msps
fNCO
NCO frequency
reg value = 00000000h
(see Table 21 to Table 24)
D-
0
-
MHz
reg value = F8000000h
(see Table 21 to Table 24)
D
-
630
-
MHz
Table 5.
Characteristics …continued
VDDA(1V8) =VDDD = 1.7 V to 1.9 V; VDDA(3V3) = 3.13 V to 3.47 V; AGND and GND are shorted together; Tamb = 40 C to
+85
C; typical values measured at VDDA(1V8) =VDDD =1.8 V; VDDA(3V3) =3.3 V; Tamb =+25 C; RL =50 ; IO(fs) =20mA;
maximum sample rate; PLL off unless otherwise specified.
Symbol
Parameter
Conditions
Test[1]
Min
Typ
Max
Unit


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