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KMB-001CEVALZ データシート(PDF) 3 Page - Intersil Corporation |
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KMB-001CEVALZ データシート(HTML) 3 Page - Intersil Corporation |
3 / 32 page ISLA224P12 3 FN7983.3 August 17, 2012 12, 13 VINAN, VINAP Channel A Analog Input Negative, Positive 15 CLKDIV Tri-Level Clock Divider Control 18 RESETN Power On Reset (Active Low) 22, 23 CLKP, CLKN Clock Input True, Complement 24, 25 CLKDIVRSTP, CLKDIVRSTN Synchronous Clock Divider Reset True, Complement 28, 29 D13N, D13P LVDS Bit 13 (MSB) Output Complement, True 30, 31 D12N, D12P LVDS Bit 12 Output Complement, True 33, 34 D11N, D11P LVDS Bit 11 Output Complement, True 35, 36 D10N, D10P LVDS Bit 10 Output Complement, True 37, 38 D9N, D9P LVDS Bit 9 Output Complement, True 39, 40 D8N, D8P LVDS Bit 8 Output Complement, True 41, 42 D7N, D7P LVDS Bit 7 Output Complement, True 43, 44 D6N, D6P LVDS Bit 6 Output Complement, True 46 RLVDS LVDS Bias Resistor (connect to OVSS with 1%10k Ω) 47, 48 CLKOUTN, CLKOUTP LVDS Clock Output Complement, True 49, 50 D5N, D5P LVDS Bit 5 Output Complement, True 51, 52 D4N, D4P LVDS Bit 4 Output Complement, True 53, 54 D3N, D3P LVDS Bit 3 Output Complement, True 55, 56 D2N, D2P LVDS Bit 2 Output Complement, True 57, 58 D1N, D1P LVDS Bit 1 Output Complement, True 59, 60 D0N, D0P LVDS Bit 0 (LSB) Output Complement, True 63, 64 ORN, ORP LVDS Over Range Complement, True 66 SDO SPI Serial Data Output 67 CSB SPI Chip Select (active low) 68 SCLK SPI Clock 69 SDIO SPI Serial Data Input/Output Exposed Paddle AVSS Analog Ground Pin Descriptions - 72 Ld QFN, LVDS Mode (Continued) PIN NUMBER LVDS PIN NAME LVDS PIN FUNCTION |
同様の部品番号 - KMB-001CEVALZ |
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同様の説明 - KMB-001CEVALZ |
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