データシートサーチシステム |
|
ISLA222S データシート(PDF) 1 Page - Intersil Corporation |
|
ISLA222S データシート(HTML) 1 Page - Intersil Corporation |
1 / 40 page 1 Dual 12-Bit, 250/200/125 MSPS JESD204B High Speed Serial Output ADC ISLA222S The ISLA222S is a series of low-power, high-performance, dual-channel 12-bit, analog-to-digital converters. Designed with FemtoCharge™ technology on a standard CMOS process, the series supports sampling rates of up to 250MSPS. The ISLA222S is part of a pin-compatible family of 12- and 14-bit dual-channel A/Ds with maximum sample rates ranging from 125MSPS to 250MSPS and shares the same analog core as Intersil's proven ISLA222P series of ADCs. The family minimizes power consumption while providing state-of-the art dynamic performance, offering an optimal performance-vs- power trade-off. Differentiating the ISLA222S from the ISLA222P is its highly configurable, JESD204B-compliant, high speed serial output link. The link offers data rates up to 4.375Gbps per lane and multiple packing modes. It can be configured to use one, two, or three lanes to transmit the conversion data, allowing for flexibility in the receiver design. The SERDES transmitter also provides deterministic latency and multi-chip time alignment support to satisfy an application's complex synchronization requirements. A serial peripheral interface (SPI) port allows for extensive configurability of the JESD204B transmitter including access to its built-in link and transport-layer test patterns. The SPI port also provides control for numerous additional features including the fine gain and offset adjustments of the two ADC cores as well as the programmable clock divider, enabling 2x and 4x harmonic clocking. The ISLA222S is available in a space-saving 7mmx7mm 48 Ld QFN package. The package features a thermal pad for improved thermal performance and is specified over the full industrial temperature range (-40°C to +85°C). Features •JESD204A/B High Speed Data Interface -JESD204A Compliant - JESD204B Device Subclass 0 Compliant - JESD204B Device Subclass 2 Compatible - Up to 3 JESD204 Output Lanes Running up to 4.375Gbps - Highly Configurable JESD204 Transmitter • Multiple Chip Time Alignment and Deterministic Latency Support (JESD204B Device Subclass 2) • SPI Programmable Debugging Features and Test Patterns • 48-pin QFN 7mmx7mm Package Key Specifications • SNR @ 250/200/125MSPS 70.6/71.2/71.7 dBFS fIN = 30MHz 70.3/70.7/70.9 dBFS fIN = 190MHz • SFDR @ 250/200/125MSPS 87/93/95 dBc fIN = 30MHz 84/93/86 dBc fIN = 190MHz • Total Power Consumption: 989mW @ 250MSPS Applications • Radar and Satellite Antenna Array Processing • Broadband Communications and Microwave Receivers • High-Performance Data Acquisition • Communications Test Equipment • High-Speed Medical Imaging FIGURE 1. SERDES DATA EYE AT 4.375Gbps Pin-Compatible Family MODEL RESOLUTION SPEED (MSPS) PRODUCT AVAILABILITY ISLA224S25 14 250 Now ISLA224S20 14 200 Now ISLA224S12 14 125 Now ISLA222S25 12 250 Now ISLA222S20 12 200 Now ISLA222S12 12 125 Now CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2012. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. May 1, 2012 FN8302.0 |
同様の部品番号 - ISLA222S |
|
同様の説明 - ISLA222S |
|
|
リンク URL |
プライバシーポリシー |
ALLDATASHEET.JP |
ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |