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TS2PCIE412 データシート(PDF) 9 Page - Texas Instruments |
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TS2PCIE412 データシート(HTML) 9 Page - Texas Instruments |
9 / 17 page CL (see Note A) TEST CIRCUIT S1 2 × Open GND RL RL VOH VOL VOLTAGE WAVEFORMS OUTPUT SKEW (tsk(o)) Data Out at YB1 or YB2 50 Ω VG1 VDD VSEL VSEL VDD VDD VDD/2 0 DUT 50 Ω 50 Ω VG2 50 Ω VI TEST RL S1 CL 1.5 V to 2 V VDD tsk(p) tsk(o) 1.5 V to 2 V Open Open 200 Ω 200 Ω V or GND DD V or GND DD 10 pF 10 pF Input Generator Input Generator VO (VOH + VOL)/2 VOH VOL Data Out at XB1 or XB2 (VOH + VOL)/2 Data In at Ax or Ay tPLHx tPHLx tsk(o) tsk(o) tPLHy tPHLy tsk(o) = tPLHy - t PLHx or tPHLy - t PHLx VOH VOL VOLTAGE WAVEFORMS PULSE SKEW [tsk(p)] Output (VOH + VOL)/2 Input VDD/2 tPLH tPHL tsk(p) = tPHL - t PLH VDD VO VI VO TS2PCIE412 www.ti.com SCDS269C – MARCH 2009 – REVISED APRIL 2010 PARAMETER MEASUREMENT INFORMATION (Skew) A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 7. Test Circuit and Voltage Waveforms Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TS2PCIE412 |
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同様の説明 - TS2PCIE412 |
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