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TSC2003IPWRQ1 データシート(PDF) 2 Page - Texas Instruments |
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TSC2003IPWRQ1 データシート(HTML) 2 Page - Texas Instruments |
2 / 28 page 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PW PACKAGE (TOP VIEW) IN1 IN2 A0 A1 SCL SDA PENIRQ V REF V DD X+ Y+ X– Y– GND V BAT1 V BAT2 TSC2003-Q1 SBAS454 – DECEMBER 2008 ........................................................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) TA PACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING –40°C to 85°C TSSOP – PW Reel of 2000 TSC2003IPWRQ1 T2003Q1 (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. (2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. VDD 1 Power supply X+ 2 I X+ position Y+ 3 I Y+ position X– 4 I X– position Y– 5 I Y– position GND 6 Ground VBAT1 7 I Battery monitor 1 VBAT2 8 I Battery monitor 1 VREF 9 I/O Voltage reference PENIRQ 10 O Pen interrupt. Open-drain, requires 30-k Ω to 100-kΩ external pullup resistor. SDA 11 I/O Serial data SCL 12 I Serial clock A1 13 I I2C bus address A1 A0 14 I I2C bus address A0 IN2 15 I Auxiliary analog-to-digital converter input 2 IN1 16 I Auxiliary analog-to-digital converter input 1 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TSC2003-Q1 |
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