SN74ALS29861, SN74ALS29862

10BIT BUS TRANSCEIVERS WITH 3STATE OUTPUTS

SDAS097B − D2915, JANUARY 1986 − REVISED AUGUST 1988

POST OFFICE BOX 655303

6

PARAMETER MEASUREMENT INFORMATION

LOAD CIRCUIT

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

PULSE DURATIONS

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

SWITCH POSITION TABLE

Closed

Closed

Closed

Closed

Closed

Closed

Closed

Closed

Closed

Closed

Open

Open

S1

S2

TEST

tPLH

tPHL

tPZH

tPZL

tPHZ

tPLZ

S1

R1

1 k

Ω

CL

(see Note A)

RL

All Diodes

1N916 or 1N3064

S2

Test Point

VCC

From Output

Under Test

180

Ω

3 V

0 V

1.5 V

1.5 V

1.5 V

3 V

0 V

Timing

Input

Data

Input

tPLH

tPHL

tPHL

tPLH

VOH

VOH

VOL

VOL

1.5 V

1.5 V

3 V

0 V

Input

Out-of-Phase

Output

In-Phase

Output

1.5 V

1.5 V

1.5 V

1.5 V

3 V

0 V

3 V

0 V

1.5 V

1.5 V

1.5 V

1.5 V

tw

High-Level

Input

Low-Level

Input

1.5 V

1.5 V

3 V

0 V

VOL

VOH

1.5 V

1.5 V

0.5 V

0.5 V

Output

Control

Waveform 1

(see Note B)

Waveform 2

(see Note B)

≈ 1.5 V

≈ 0 V

≈ 1.5 V

≈ 4.5 V

tPHZ

tPLZ

tPZL

tPZH

tsu

th

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR

≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.

Figure 1