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SN74ALVC162601DL データシート(PDF) 1 Page - Texas Instruments |
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SN74ALVC162601DL データシート(HTML) 1 Page - Texas Instruments |
1 / 9 page SN74ALVC162601 18BIT UNIVERSAL BUS TRANSCEIVER WITH 3STATE OUTPUTS SCAS376 − MARCH 1994 Copyright 1994, Texas Instruments Incorporated 9−1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 • Member of the Texas Instruments Widebus Family • UBT (Universal Bus Transceiver) Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Mode • EPIC (Enhanced-Performance Implanted CMOS) Submicron Process • Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors on All I/O Pins • Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages description This 18-bit universal bus transceiver is designed for 2.7-V to 3.6-V VCC operation. The SN74ALVC162601 combines D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. The clock can be controlled by the clock-enable (CLKENAB and CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A-bus data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. Output enable OEAB is active low. When OEAB is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, CLKBA, and CLKENBA. The B-port outputs, include 25- Ω series resistors to reduce overshoot and undershoot. The SN74ALVC162601 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The SN74ALVC162601 is characterized for operation from − 40 °C to 85°C. DGG OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 OEAB LEAB A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 OEBA LEBA CLKENAB CLKAB B1 GND B2 B3 VCC B4 B5 B6 GND B7 B8 B9 B10 B11 B12 GND B13 B14 B15 VCC B16 B17 GND B18 CLKBA CLKENBA PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. EPIC, UBT, and Widebus are trademarks of Texas Instruments Incorporated. |
同様の部品番号 - SN74ALVC162601DL |
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同様の説明 - SN74ALVC162601DL |
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